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path: root/drivers/clk/mediatek/clk-mt8173.c
Commit message (Expand)AuthorAgeFilesLines
* clk: mediatek: mt8173: Break down clock drivers and allow module buildAngeloGioacchino Del Regno2023-01-301-1187/+0
* clk: mediatek: mt8173: Remove mtk_clk_enable_critical()AngeloGioacchino Del Regno2023-01-301-25/+16
* clk: mediatek: mt8173: Migrate to platform driver and common probeAngeloGioacchino Del Regno2023-01-301-207/+276
* clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno2023-01-301-4/+6
* clk: mediatek: cpumux: Propagate struct device where possibleAngeloGioacchino Del Regno2023-01-301-2/+2
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-301-12/+12
* clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
* clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen2022-06-151-4/+7
* clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen2022-06-151-2/+17
* clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen2022-06-151-2/+2
* clk: mediatek: mt8173: Switch to clk_hw provider APIsChen-Yu Tsai2022-05-191-5/+4
* clk: mediatek: Switch to clk_hw provider APIsChen-Yu Tsai2022-05-191-7/+5
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-191-26/+26
* clk: mediatek: use en_mask as a pure div_en_maskChun-Jie Chen2022-05-181-14/+14
* clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai2022-02-171-2/+3
* clk / soc: mediatek: Move mt8173 MMSYS to platform driverMatthias Brugger2020-04-131-104/+0
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1
* clk: mediatek: correct cpu clock name for MT8173 SoCSeiya Wang2019-02-261-2/+2
* clk: mediatek: export cpu multiplexer clock for MT8173 SoCsSean Wang2017-06-191-0/+23
* clk: mediatek: clk-mt8173: Unmap region obtained by of_iomapArvind Yadav2016-09-211-1/+3
* clk: mediatek: remove hdmitx_dig_cts from TOP clocksPhilipp Zabel2016-05-061-1/+0
* clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock outputPhilipp Zabel2016-05-061-0/+5
* clk: mediatek: make dpi0_sel propagate rate changesPhilipp Zabel2016-05-061-1/+5
* clk: mediatek: Add USB clock support in MT8173 APMIXEDSYSJames Liao2015-10-011-0/+47
* clk: mediatek: Add subsystem clocks of MT8173James Liao2015-10-011-0/+267
* clk: mediatek: Fix rate and dependency of MT8173 clocksJames Liao2015-10-011-6/+13
* clk: mediatek: Add __initdata and __init for data and functionsJames Liao2015-10-011-3/+3
* clk: mediatek: Remove unused code from MT8173.James Liao2015-10-011-2/+0
* clk: mediatek: Removed unused dpi_ck clock from MT8173James Liao2015-10-011-1/+0
* clk: mediatek: add 13mhz clock for MT8173Joe.C2015-10-011-0/+5
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-281-0/+1
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| * clk: mediatek: Properly include clk.hStephen Boyd2015-07-201-0/+1
* | clk: mediatek: Add MT8173 MMPLL change rate supportJames Liao2015-07-281-3/+21
* | clk: mediatek: mt8173: Fix enabling of critical clocksSascha Hauer2015-07-061-5/+21
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* clk: mediatek: Fix apmixedsys clock registrationJames Liao2015-06-041-1/+1
* clk: mediatek: Add basic clocks for Mediatek MT8173.James Liao2015-05-051-0/+830
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