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path: root/drivers/clk/mediatek/clk-mtk.c
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*-. Merge branches 'clk-platform', 'clk-i2c', 'clk-mediatek', 'clk-i2cid' and 'cl...Stephen Boyd2023-06-261-5/+8
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| | * clk: mediatek: clk-mtk: Grab iomem pointer for divider clocksAngeloGioacchino Del Regno2023-06-161-3/+3
| | * clk: mediatek: fix of_iomap memory leakBosi Zhang2023-06-121-2/+5
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* | clk: mediatek: Make mtk_clk_pdev_remove() return voidUwe Kleine-König2023-05-101-3/+1
* | clk: mediatek: Make mtk_clk_simple_remove() return voidUwe Kleine-König2023-05-101-6/+6
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* clk: mediatek: Propagate struct device with mtk_clk_register_dividers()AngeloGioacchino Del Regno2023-03-131-3/+5
* clk: mediatek: Add divider clocks to mtk_clk_simple_{probe,remove}()AngeloGioacchino Del Regno2023-03-131-2/+17
* clk: mediatek: clk-mtk: Introduce clk_mtk_pdev_{probe,remove}()AngeloGioacchino Del Regno2023-03-131-8/+46
* clk: mediatek: clk-mtk: Switch to device_get_match_data()AngeloGioacchino Del Regno2023-03-131-3/+2
* clk: mediatek: clk-mtk: Remove unneeded semicolonYang Li2023-02-101-1/+1
* clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-301-0/+8
* clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-301-8/+93
* clk: mediatek: clk-mtk: Add dummy clock opsAngeloGioacchino Del Regno2023-01-301-0/+16
* clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno2023-01-301-5/+6
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-301-2/+2
* clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocksAngeloGioacchino Del Regno2022-11-291-1/+1
* clk: mediatek: Export required common code symbolsMarkus Schneider-Pargmann2022-09-301-0/+2
* clk: mediatek: Provide mtk_devm_alloc_clk_dataMarkus Schneider-Pargmann2022-09-301-5/+28
* clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()Chen-Yu Tsai2022-09-291-5/+5
* clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanupChen-Yu Tsai2022-09-291-1/+1
* clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probeYassine Oudjana2022-09-261-1/+2
* clk: mediatek: Export required symbols to compile clk drivers as moduleAngeloGioacchino Del Regno2022-09-261-0/+2
* clk: mediatek: reset: Add reset support for simple probeRex-BC Chen2022-06-151-0/+7
* clk: mediatek: Switch to clk_hw provider APIsChen-Yu Tsai2022-05-191-37/+39
* clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai2022-05-191-61/+50
* clk: mediatek: Make mtk_clk_register_composite() staticChen-Yu Tsai2022-05-191-1/+1
* clk: mediatek: Warn if clk IDs are duplicatedChen-Yu Tsai2022-02-171-4/+14
* clk: mediatek: Unregister clks in mtk_clk_simple_probe() error pathChen-Yu Tsai2022-02-171-1/+3
* clk: mediatek: mtk: Implement error handling in register APIsChen-Yu Tsai2022-02-171-25/+93
* clk: mediatek: mtk: Clean up included headersChen-Yu Tsai2022-02-171-7/+6
* clk: mediatek: Add mtk_clk_simple_remove()Chen-Yu Tsai2022-02-171-0/+15
* clk: mediatek: Implement mtk_clk_unregister_composites() APIChen-Yu Tsai2022-02-171-0/+46
* clk: mediatek: Implement mtk_clk_unregister_divider_clks() APIChen-Yu Tsai2022-02-171-0/+19
* clk: mediatek: Implement mtk_clk_unregister_factors() APIChen-Yu Tsai2022-02-171-0/+20
* clk: mediatek: Implement mtk_clk_unregister_fixed_clks() APIChen-Yu Tsai2022-02-171-0/+20
* clk: mediatek: gate: Consolidate gate type clk related codeChen-Yu Tsai2022-02-171-51/+0
* clk: mediatek: Use %pe to print errorsChen-Yu Tsai2022-02-171-12/+6
* clk: mediatek: support COMMON_CLK_MEDIATEK module buildMiles Chen2021-09-141-0/+8
* clk: mediatek: Fix resource leak in mtk_clk_simple_probeChun-Jie Chen2021-09-141-2/+10
* clk: mediatek: Add API for clock resource recycleChun-Jie Chen2021-09-141-0/+9
* clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providersChun-Jie Chen2021-07-271-0/+23
* clk: mediatek: Get regmap without syscon compatible checkChun-Jie Chen2021-07-271-1/+1
* clk: mediatek: Register clock gate with deviceWeiyi Lu2019-09-171-3/+13
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-301-9/+1
*-. Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk...Stephen Boyd2019-03-081-2/+2
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| | * clk: mediatek: Add flags to mtk_gateJasper Mattsson2019-02-261-1/+1
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| * clk: mediatek: add MUX_GATE_FLAGS_2chunhui dai2019-02-251-1/+1
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* clk: Convert to using %pOF instead of full_nameRob Herring2017-07-211-1/+1
* clk: mediatek: Add MT2701 clock supportShunli Wang2016-11-081-0/+40
* clk: mediatek: remove __init from clk registration functionsJames Liao2016-08-181-6/+6
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