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path: root/drivers/clk/mediatek
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*-. Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and 'clk-socfpga...Stephen Boyd2023-04-25178-4565/+6842
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| * | clk: mediatek: fhctl: Mark local variables staticTom Rix2023-04-101-2/+2
| * | clk: mediatek: Use right match table, include mod_devicetableStephen Boyd2023-04-046-10/+22
| * | clk: mediatek: Add MT8188 adsp clock supportGarmin.Chang2023-03-313-0/+56
| * | clk: mediatek: Add MT8188 imp i2c wrapper clock supportGarmin.Chang2023-03-313-0/+88
| * | clk: mediatek: Add MT8188 wpesys clock supportGarmin.Chang2023-03-313-0/+111
| * | clk: mediatek: Add MT8188 vppsys1 clock supportGarmin.Chang2023-03-312-1/+110
| * | clk: mediatek: Add MT8188 vppsys0 clock supportGarmin.Chang2023-03-313-0/+122
| * | clk: mediatek: Add MT8188 vencsys clock supportGarmin.Chang2023-03-313-0/+62
| * | clk: mediatek: Add MT8188 vdosys1 clock supportGarmin.Chang2023-03-312-1/+153
| * | clk: mediatek: Add MT8188 vdosys0 clock supportGarmin.Chang2023-03-313-0/+113
| * | clk: mediatek: Add MT8188 vdecsys clock supportGarmin.Chang2023-03-313-0/+100
| * | clk: mediatek: Add MT8188 mfgcfg clock supportGarmin.Chang2023-03-313-0/+57
| * | clk: mediatek: Add MT8188 ipesys clock supportGarmin.Chang2023-03-313-0/+60
| * | clk: mediatek: Add MT8188 imgsys clock supportGarmin.Chang2023-03-313-0/+120
| * | clk: mediatek: Add MT8188 ccusys clock supportGarmin.Chang2023-03-312-1/+51
| * | clk: mediatek: Add MT8188 camsys clock supportGarmin.Chang2023-03-313-0/+128
| * | clk: mediatek: Add MT8188 infrastructure clock supportGarmin.Chang2023-03-312-1/+200
| * | clk: mediatek: Add MT8188 peripheral clock supportGarmin.Chang2023-03-312-1/+61
| * | clk: mediatek: Add MT8188 topckgen clock supportGarmin.Chang2023-03-312-1/+1351
| * | clk: mediatek: Add MT8188 apmixedsys clock supportGarmin.Chang2023-03-313-0/+167
| * | clk: mediatek: mt81xx: Ensure fhctl code is availableArnd Bergmann2023-03-201-0/+3
| * | clk: mediatek: Ensure fhctl code is available for COMMON_CLK_MT6795Stephen Boyd2023-03-171-0/+1
| * | clk: mediatek: mt8135: Convert to simple probe and enable module buildAngeloGioacchino Del Regno2023-03-132-102/+76
| * | clk: mediatek: mt8135: Join root_clk_alias and top_divs arraysAngeloGioacchino Del Regno2023-03-131-6/+1
| * | clk: mediatek: mt8135-apmixedsys: Convert to platform_driver and moduleAngeloGioacchino Del Regno2023-03-131-5/+48
| * | clk: mediatek: mt8135: Properly use CLK_IS_CRITICAL flagAngeloGioacchino Del Regno2023-03-131-6/+8
| * | clk: mediatek: mt8135: Move apmixedsys to its own fileAngeloGioacchino Del Regno2023-03-133-47/+63
| * | clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno2023-03-13148-1/+150
| * | clk: mediatek: Kconfig: Allow module build for core mt8192 clocksAngeloGioacchino Del Regno2023-03-131-1/+1
| * | clk: mediatek: mt8192: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-218/+219
| * | clk: mediatek: Split configuration options for MT8186 clock driversAngeloGioacchino Del Regno2023-03-132-6/+91
| * | clk: mediatek: Allow building most MT6797 clock drivers as modulesAngeloGioacchino Del Regno2023-03-131-4/+4
| * | clk: mediatek: Allow building most MT6765 clock drivers as modulesAngeloGioacchino Del Regno2023-03-131-13/+13
| * | clk: mediatek: Allow all MT8183 clocks to be built as modulesAngeloGioacchino Del Regno2023-03-131-12/+12
| * | clk: mediatek: Allow all MT8167 clocks to be built as modulesAngeloGioacchino Del Regno2023-03-131-8/+8
| * | clk: mediatek: Allow MT7622 clocks to be built as modulesAngeloGioacchino Del Regno2023-03-131-4/+4
| * | clk: mediatek: Allow building MT8192 non-critical clocks as modulesAngeloGioacchino Del Regno2023-03-131-12/+12
| * | clk: mediatek: Split MT8195 clock drivers and allow module buildAngeloGioacchino Del Regno2023-03-132-7/+113
| * | clk: mediatek: mt2712: Change Kconfig options to allow module buildAngeloGioacchino Del Regno2023-03-131-8/+8
| * | clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno2023-03-13109-1/+109
| * | clk: mediatek: Switch to module_platform_driver() where possibleAngeloGioacchino Del Regno2023-03-1396-149/+98
| * | clk: mediatek: mt8186-mcu: Migrate to common probe mechanismAngeloGioacchino Del Regno2023-03-131-55/+13
| * | clk: mediatek: mt7986-eth: Migrate to common probe mechanismAngeloGioacchino Del Regno2023-03-131-51/+32
| * | clk: mediatek: mt7986-infracfg: Migrate to common probe mechanismAngeloGioacchino Del Regno2023-03-131-44/+17
| * | clk: mediatek: mt7986-apmixed: Use PLL_AO flag to set critical clockAngeloGioacchino Del Regno2023-03-131-3/+1
| * | clk: mediatek: Propagate struct device with mtk_clk_register_dividers()AngeloGioacchino Del Regno2023-03-134-6/+9
| * | clk: mediatek: mt8516: Allow building clock drivers as modulesAngeloGioacchino Del Regno2023-03-131-2/+2
| * | clk: mediatek: mt8516: Convert to platform driver and simple probeAngeloGioacchino Del Regno2023-03-132-66/+57
| * | clk: mediatek: mt8516: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-82/+122
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-10 02:37:36 +0000