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path: root/drivers/clk/mediatek
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* clk: mediatek: mux: Update parent at enable timeLaurent Pinchart2021-02-092-3/+30
* clk: mediatek: mux: Drop unused clock opsLaurent Pinchart2021-02-092-70/+4
* clk: mediatek: Select all the MT8183 clocks by defaultEnric Balletbo i Serra2021-02-081-0/+11
* clk: mediatek: Make mtk_clk_register_mux() a static functionWeiyi Lu2020-12-172-5/+1
*-. Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk...Stephen Boyd2020-10-2012-14/+1511
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| | * clk: mediatek: Add MT8167 clock supportFabien Parent2020-10-138-0/+1505
| | * clk: mediatek: add UART0 clock supportHanks Chen2020-10-081-0/+2
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| * clk: mediatek: fix platform_no_drv_owner.cocci warningsZou Wei2020-09-221-1/+0
| * clk: mediatek: mt7629: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-7/+2
| * clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-6/+2
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* treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada2020-06-141-32/+32
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-06-1010-1/+1494
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| * clk: mediatek: Remove ifr{0,1}_cfg_regs structuresStephen Boyd2020-06-091-30/+0
| * clk: mediatek: assign the initial value to clk_init_data of mtk_muxWeiyi Lu2020-05-281-1/+1
| * clk: mediatek: Add MT6765 clock supportOwen Chen2020-05-289-0/+1523
* | clk/soc: mediatek: mt6779: Bind clock driver from platform deviceMatthias Brugger2020-05-201-7/+2
* | clk/soc: mediatek: mt6797: Bind clock driver from platform deviceMatthias Brugger2020-05-201-7/+2
* | clk/soc: mediatek: mt8183: Bind clock driver from platform deviceMatthias Brugger2020-05-201-7/+2
* | clk / soc: mediatek: Bind clock and gpu driver for mt2701Enric Balletbo i Serra2020-05-201-7/+2
* | clk / soc: mediatek: Bind clock and gpu driver for mt2712Enric Balletbo i Serra2020-05-201-7/+2
* | clk / soc: mediatek: Move mt8173 MMSYS to platform driverMatthias Brugger2020-04-134-104/+154
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* clk: Fix Kconfig indentationKrzysztof Kozlowski2020-01-041-22/+22
* clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-2/+1
* clk: mediatek: mt7629: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* clk: mediatek: mt6779: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-2/+1
* clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-09-2018-11/+2102
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| * clk: mediatek: Runtime PM support for MT8183 mcucfg clock providerWeiyi Lu2019-09-171-2/+5
| * clk: mediatek: Register clock gate with deviceWeiyi Lu2019-09-174-6/+23
| * clk: mediatek: add pericfg clocks for MT8183Chunfeng Yun2019-09-171-0/+30
| * clk: mediatek: Add MT6779 clock supportmtk017612019-09-0911-0/+1974
| * clk: reset: Modify reset-controller driveryong.liang2019-08-083-4/+71
* | clk: mediatek: mt8183: Register 13MHz clock earlier for clocksourceWeiyi Lu2019-07-221-12/+34
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-175-24/+72
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| *-. Merge branches 'clk-debugfs', 'clk-unused', 'clk-refactor' and 'clk-qoriq' in...Stephen Boyd2019-07-121-5/+0
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| | | * clk: mediatek: mt8516: Remove unused variablePhilippe Mazenauer2019-06-071-5/+0
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| * | clk: mediatek: Remove MT8183 unused clockErin Lo2019-06-061-19/+0
| * | clk: mediatek: add audsys clock driver for MT8516Fabien Parent2019-06-063-0/+72
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* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-3035-315/+35
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
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*-. Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-...Stephen Boyd2019-05-0720-33/+3392
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| | * clk: mediatek: add clock driver for MT8516Fabien Parent2019-04-253-0/+824
| | * clk: mediatek: Allow changing PLL rate when it is offJames Liao2019-04-111-11/+2
| | * clk: mediatek: Add MT8183 clock supportWeiyi Lu2019-04-1115-0/+2196
| | * clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_dataWeiyi Lu2019-04-112-6/+12
| | * clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_dataOwen Chen2019-04-112-4/+13
| | * clk: mediatek: Add new clkmux register APIOwen Chen2019-04-113-1/+314
| | * clk: mediatek: Disable tuner_en before change PLL rateOwen Chen2019-04-111-14/+34
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