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path: root/drivers/clk/mediatek
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* clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167Miles Chen2021-07-271-15/+10
* clk: mediatek: Add MT8192 vencsys clock supportChun-Jie Chen2021-07-273-0/+60
* clk: mediatek: Add MT8192 vdecsys clock supportChun-Jie Chen2021-07-273-0/+101
* clk: mediatek: Add MT8192 scp adsp clock supportChun-Jie Chen2021-07-273-0/+57
* clk: mediatek: Add MT8192 msdc clock supportChun-Jie Chen2021-07-273-0/+92
* clk: mediatek: Add MT8192 mmsys clock supportChun-Jie Chen2021-07-273-0/+115
* clk: mediatek: Add MT8192 mfgcfg clock supportChun-Jie Chen2021-07-273-0/+57
* clk: mediatek: Add MT8192 mdpsys clock supportChun-Jie Chen2021-07-273-0/+89
* clk: mediatek: Add MT8192 ipesys clock supportChun-Jie Chen2021-07-273-0/+64
* clk: mediatek: Add MT8192 imp i2c wrapper clock supportChun-Jie Chen2021-07-273-0/+126
* clk: mediatek: Add MT8192 imgsys clock supportChun-Jie Chen2021-07-273-0/+77
* clk: mediatek: Add MT8192 camsys clock supportChun-Jie Chen2021-07-273-0/+114
* clk: mediatek: Add MT8192 audio clock supportChun-Jie Chen2021-07-273-0/+125
* clk: mediatek: Add MT8192 basic clocks supportChun-Jie Chen2021-07-275-4/+1358
* clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providersChun-Jie Chen2021-07-272-0/+31
* clk: mediatek: Add configurable enable control to mtk_pll_dataChun-Jie Chen2021-07-272-14/+21
* clk: mediatek: Fix asymmetrical PLL enable and disable controlChun-Jie Chen2021-07-271-4/+16
* clk: mediatek: Get regmap without syscon compatible checkChun-Jie Chen2021-07-274-4/+4
* clk: mediatek: mux: Update parent at enable timeLaurent Pinchart2021-02-092-3/+30
* clk: mediatek: mux: Drop unused clock opsLaurent Pinchart2021-02-092-70/+4
* clk: mediatek: Select all the MT8183 clocks by defaultEnric Balletbo i Serra2021-02-081-0/+11
* clk: mediatek: Make mtk_clk_register_mux() a static functionWeiyi Lu2020-12-172-5/+1
*-. Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk...Stephen Boyd2020-10-2012-14/+1511
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| | * clk: mediatek: Add MT8167 clock supportFabien Parent2020-10-138-0/+1505
| | * clk: mediatek: add UART0 clock supportHanks Chen2020-10-081-0/+2
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| * clk: mediatek: fix platform_no_drv_owner.cocci warningsZou Wei2020-09-221-1/+0
| * clk: mediatek: mt7629: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-7/+2
| * clk: mediatek: mt6797: simplify the return expression of mtk_infrasys_initLiu Shixin2020-09-221-6/+2
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* treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada2020-06-141-32/+32
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-06-1010-1/+1494
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| * clk: mediatek: Remove ifr{0,1}_cfg_regs structuresStephen Boyd2020-06-091-30/+0
| * clk: mediatek: assign the initial value to clk_init_data of mtk_muxWeiyi Lu2020-05-281-1/+1
| * clk: mediatek: Add MT6765 clock supportOwen Chen2020-05-289-0/+1523
* | clk/soc: mediatek: mt6779: Bind clock driver from platform deviceMatthias Brugger2020-05-201-7/+2
* | clk/soc: mediatek: mt6797: Bind clock driver from platform deviceMatthias Brugger2020-05-201-7/+2
* | clk/soc: mediatek: mt8183: Bind clock driver from platform deviceMatthias Brugger2020-05-201-7/+2
* | clk / soc: mediatek: Bind clock and gpu driver for mt2701Enric Balletbo i Serra2020-05-201-7/+2
* | clk / soc: mediatek: Bind clock and gpu driver for mt2712Enric Balletbo i Serra2020-05-201-7/+2
* | clk / soc: mediatek: Move mt8173 MMSYS to platform driverMatthias Brugger2020-04-134-104/+154
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* clk: Fix Kconfig indentationKrzysztof Kozlowski2020-01-041-22/+22
* clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-2/+1
* clk: mediatek: mt7629: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* clk: mediatek: mt6779: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-2/+1
* clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-10-161-4/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-09-2018-11/+2102
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| * clk: mediatek: Runtime PM support for MT8183 mcucfg clock providerWeiyi Lu2019-09-171-2/+5
| * clk: mediatek: Register clock gate with deviceWeiyi Lu2019-09-174-6/+23
| * clk: mediatek: add pericfg clocks for MT8183Chunfeng Yun2019-09-171-0/+30
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-20 20:22:17 +0000