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path: root/drivers/clk/mediatek
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* clk: mediatek: clk-mtk: Remove unneeded semicolonYang Li2023-02-101-1/+1
* clk: mediatek: remove MT8195 vppsys/0/1 simple_probeMoudy Ho2023-01-312-30/+86
* clk: mediatek: add MT7981 clock supportDaniel Golle2023-01-306-0/+870
* clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-301-42/+13
* clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabledAngeloGioacchino Del Regno2023-01-301-22/+24
* clk: mediatek: clk-mt6795-topckgen: Migrate to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-301-72/+14
* clk: mediatek: clk-mt8186-topckgen: Migrate to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-301-84/+19
* clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-301-68/+17
* clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-302-0/+11
* clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divsAngeloGioacchino Del Regno2023-01-301-22/+15
* clk: mediatek: mt8186: Join top_adj_div and top_muxesAngeloGioacchino Del Regno2023-01-301-14/+2
* clk: mediatek: mt8192: Join top_adj_divs and top_muxesAngeloGioacchino Del Regno2023-01-301-13/+3
* clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divsAngeloGioacchino Del Regno2023-01-301-32/+7
* clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-302-126/+27
* clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-01-302-8/+103
* clk: mediatek: Switch to mtk_clk_simple_probe() where possibleAngeloGioacchino Del Regno2023-01-3014-560/+263
* clk: mediatek: mt8173: Break down clock drivers and allow module buildAngeloGioacchino Del Regno2023-01-3010-655/+874
* clk: mediatek: mt8173: Remove mtk_clk_enable_critical()AngeloGioacchino Del Regno2023-01-301-25/+16
* clk: mediatek: mt8173: Migrate to platform driver and common probeAngeloGioacchino Del Regno2023-01-301-207/+276
* clk: mediatek: clk-mtk: Add dummy clock opsAngeloGioacchino Del Regno2023-01-302-0/+35
* clk: mediatek: clk-mux: Propagate struct device for mtk-muxAngeloGioacchino Del Regno2023-01-3012-19/+32
* clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno2023-01-3020-58/+93
* clk: mediatek: cpumux: Propagate struct device where possibleAngeloGioacchino Del Regno2023-01-307-13/+14
* clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno2023-01-3052-160/+156
* clk: mediatek: mt8192: Propagate struct device for gate clocksAngeloGioacchino Del Regno2023-01-301-4/+9
* clk: mediatek: mt8192: Correctly unregister and free clocks on failureAngeloGioacchino Del Regno2023-01-301-17/+60
*-. Merge branches 'clk-mediatek', 'clk-trace', 'clk-qcom' and 'clk-microchip' in...Stephen Boyd2022-12-1219-386/+1082
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| * | clk: mediatek: fix dependency of MT7986 ADC clocksDaniel Golle2022-11-291-1/+1
| * | clk: mediatek: Change PLL register API for MT8186Johnson Wang2022-11-292-3/+64
| * | clk: mediatek: Add new clock driver to handle FHCTL hardwareJohnson Wang2022-11-296-0/+635
| * | clk: mediatek: Export PLL operations symbolsJohnson Wang2022-11-292-50/+89
| * | clk: mediatek: mt8186-topckgen: Add GPU clock mux notifierAngeloGioacchino Del Regno2022-11-291-0/+27
| * | clk: mediatek: mt8186-mfg: Propagate rate changes to parentAngeloGioacchino Del Regno2022-11-291-2/+3
| * | clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-39/+39
| * | clk: mediatek: mt8192: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| * | clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| * | clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| * | clk: mediatek: mt8183: Drop flags for sys/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-38/+38
| * | clk: mediatek: mt8183: Compress top_divs array entriesAngeloGioacchino Del Regno2022-11-291-144/+72
| * | clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factorsAngeloGioacchino Del Regno2022-11-291-31/+31
| * | clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocksAngeloGioacchino Del Regno2022-11-292-2/+7
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* / clk: mediatek: clk-mt8195-topckgen: Fix error return code in clk_mt8195_topck...Yang Yingliang2022-10-171-1/+3
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* Merge branch 'clk-rate-range' into clk-nextStephen Boyd2022-10-141-0/+10
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| * clk: mediatek: clk-mux: Add .determine_rate() callbackAngeloGioacchino Del Regno2022-10-141-0/+10
* | clk: mediatek: add driver for MT8365 SoCFabien Parent2022-09-309-0/+1614
* | clk: mediatek: Export required common code symbolsMarkus Schneider-Pargmann2022-09-301-0/+2
* | clk: mediatek: Provide mtk_devm_alloc_clk_dataMarkus Schneider-Pargmann2022-09-302-5/+30
* | clk: mediatek: mt8192: deduplicate parent clock listsChen-Yu Tsai2022-09-291-181/+25
* | clk: mediatek: Migrate remaining clk_unregister_*() to clk_hw_unregister_*()Chen-Yu Tsai2022-09-291-5/+5
* | clk: mediatek: fix unregister function in mtk_clk_register_dividers cleanupChen-Yu Tsai2022-09-291-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-17 19:06:33 +0000