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path: root/drivers/clk/pistachio
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* clk: pistachio: Declare mux table as const u32[]Jonathan Neuschäfer2022-02-251-1/+1
* clk: pistachio: Make it selectable for generic MIPS kernelJiaxun Yang2021-08-121-0/+8
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422Thomas Gleixner2019-06-054-16/+4
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
* clk: pistachio: constify clk_ops structuresJulia Lawall2018-11-061-4/+4
* clk: pistachio: correct critical clock listDamien.Horsley2015-08-261-5/+14
* clk: pistachio: Fix PLL rate calculation in integer modeZdenko Pulitika2015-08-261-2/+46
* clk: pistachio: Fix override of clk-pll settings from boot loaderZdenko Pulitika2015-08-261-3/+2
* clk: pistachio: Fix 32bit integer overflowsZdenko Pulitika2015-08-262-21/+19
* clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd2015-08-241-2/+2
* clk: pistachio: Include clk.hStephen Boyd2015-07-201-0/+1
* clk: pistachio: Add sanity checks on PLL configurationKevin Cernekee2015-06-041-4/+79
* clk: pistachio: Lock the PLL when enabled upon rate changeEzequiel Garcia2015-06-041-18/+10
* clk: pistachio: Add a pll_lock() helper for clarityEzequiel Garcia2015-06-041-4/+8
* CLK: Pistachio: Register external clock gatesAndrew Bresticker2015-03-311-0/+21
* CLK: Pistachio: Register system interface gate clocksAndrew Bresticker2015-03-311-0/+42
* CLK: Pistachio: Register peripheral clocksAndrew Bresticker2015-03-311-0/+67
* CLK: Pistachio: Register core clocksAndrew Bresticker2015-03-312-0/+200
* CLK: Pistachio: Add PLL driverAndrew Bresticker2015-03-313-0/+452
* CLK: Add basic infrastructure for Pistachio clocksAndrew Bresticker2015-03-313-0/+265
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