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path: root/drivers/clk/renesas/r8a7745-cpg-mssr.c
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* clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)Lad Prabhakar2020-09-041-1/+1
* clk: renesas: Convert to SPDX identifiersKuninori Morimoto2018-09-281-4/+1
* clk: renesas: r8a7745: Fix LB clock dividerGeert Uytterhoeven2018-04-161-1/+1
* clk: renesas: r8a7745: Add rwdt clockFabrizio Castro2018-02-201-0/+2
* clk: renesas: cpg-mssr: Add du1 clock to R8A7745Fabrizio Castro2017-10-201-0/+1
* clk: renesas: r8a7745: Remove PLL configs for MD19=0Geert Uytterhoeven2017-05-151-11/+2
* clk: renesas: r8a7745: Remove nonexisting scu-src[0789] clocksGeert Uytterhoeven2017-05-151-4/+0
* clk: renesas: cpg-mssr: Add R8A7745 supportSergei Shtylyov2016-11-101-0/+259