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path: root/drivers/clk/renesas/r8a7794-cpg-mssr.c
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* clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)Lad Prabhakar2020-09-041-1/+1
* clk: renesas: Convert to SPDX identifiersKuninori Morimoto2018-09-281-4/+1
* clk: renesas: r8a7794: Fix LB clock dividerGeert Uytterhoeven2018-04-161-1/+1
* clk: renesas: r8a7794: Add rwdt clockFabrizio Castro2018-02-201-0/+2
* clk: renesas: r8a7794: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-241-0/+255