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path: root/drivers/clk/renesas/r8a7796-cpg-mssr.c
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* clk: renesas: rcar-gen3: Correct parent clock of Audio-DMACTakeshi Kihara2019-05-311-2/+2
* clk: renesas: rcar-gen3: Correct parent clock of SYS-DMACTakeshi Kihara2019-05-311-2/+2
* clk: renesas: r8a7796: Add CPEX clockGeert Uytterhoeven2018-12-041-0/+1
* Merge branch 'clk-renesas' into clk-nextStephen Boyd2018-10-181-33/+34
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| * clk: renesas: r8a7796: Add OSC EXTAL predivider configurationGeert Uytterhoeven2018-08-271-33/+33
| * clk: renesas: rcar-gen3: Rename rint to .rGeert Uytterhoeven2018-08-271-1/+2
* | clk: renesas: use SPDX identifier for Renesas driversWolfram Sang2018-08-301-4/+1
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* clk: renesas: r8a7796: Add Z2 clockTakeshi Kihara2018-02-121-0/+1
* clk: renesas: r8a7796: Add Z clockTakeshi Kihara2018-02-121-0/+1
* clk: renesas: r8a7796: Add FDP clockABE Hiroshige2018-01-051-0/+1
* clk: renesas: r8a7796: Correct parent clock of INTC-APGeert Uytterhoeven2017-10-161-1/+1
* clk: renesas: r8a7796: Add USB3.0 clockHiromitsu Yamasaki2017-08-171-0/+1
* clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3Geert Uytterhoeven2017-08-161-17/+17
* clk: renesas: r8a7796: Add INTC-EX clockTakeshi Kihara2017-05-151-0/+1
* clk: renesas: r8a7796: Add PCIe clocksHarunobu Kurokawa2017-05-151-0/+2
* clk: renesas: r8a7796: Add PWM clockRyo Kodama2017-05-151-0/+1
* clk: renesas: r8a7796: Add HS-USB clockKazuya Mizuguchi2017-05-151-0/+1
* clk: renesas: r8a7796: Add Sound DVC clocksKazuya Mizuguchi2017-05-151-0/+2
* clk: renesas: r8a7796: Add Sound SRC clockKazuya Mizuguchi2017-05-151-0/+13
* clk: renesas: r8a7796: Add Sound SSI clockKazuya Mizuguchi2017-05-151-0/+11
* clk: renesas: r8a7796: Add USB-DMAC clocksHiromitsu Yamasaki2017-05-151-0/+2
* clk: renesas: r8a7796: Add Audio-DMAC clocksHiromitsu Yamasaki2017-05-151-0/+2
* clk: renesas: r8a7796: Add EHCI/OHCI clocksKazuya Mizuguchi2017-05-151-0/+2
* clk: renesas: r8a7796: Add HDMI clockKoji Matsuoka2017-05-151-0/+2
* clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()Geert Uytterhoeven2017-03-211-1/+1
* clk: renesas: r8a7796: Reformat core clock tableGeert Uytterhoeven2017-03-211-6/+6
* clk: renesas: r8a7796: Correct name of watchdog clockGeert Uytterhoeven2017-03-211-1/+1
* clk: renesas: r8a7796: Add IMR clocksSergei Shtylyov2017-03-061-0/+2
* clk: renesas: r8a7796: Add IIC-DVFS clockKhiem Nguyen2017-01-271-0/+1
* clk: renesas: r8a7796: Add MSIOF controller clocksHiromitsu Yamasaki2016-12-271-0/+5
* clk: renesas: r8a7796: Add CAN FD peripheral clockChris Paterson2016-12-271-0/+1
* clk: renesas: r8a7796: Add CANFD clockChris Paterson2016-12-271-0/+1
* clk: renesas: r8a7796: Add CAN peripheral clockChris Paterson2016-12-271-0/+2
* clk: renesas: r8a7796: Add VIN clocksNiklas Söderlund2016-11-071-0/+8
* clk: renesas: r8a7796: Add CSI2 clocksNiklas Söderlund2016-11-071-0/+4
* Merge branch 'rcar-rst' into clk-renesas-for-v4.10Geert Uytterhoeven2016-11-021-1/+7
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| * clk: renesas: r8a7796: Obtain mode pin values from R-Car RST driverGeert Uytterhoeven2016-11-021-1/+7
* | clk: renesas: r8a7796: Add DU and LVDS clocksLaurent Pinchart2016-11-021-0/+4
* | clk: renesas: r8a7796: Add VSP clocksLaurent Pinchart2016-11-021-0/+5
* | clk: renesas: r8a7796: Add FCP clocksLaurent Pinchart2016-11-021-0/+8
* | clk: renesas: r8a7796: Add DRIF clockRamesh Shanmugasundaram2016-11-021-0/+8
* | clk: renesas: r8a7796: Add I2C clocksUlrich Hecht2016-10-171-0/+7
* | clk: renesas: r8a7796: Add HSCIF clocksUlrich Hecht2016-10-171-0/+5
* | clk: renesas: r8a7796: Add SCIF clocksUlrich Hecht2016-10-171-0/+5
* | clk: renesas: r8a7796: Add SYS-DMAC clocksUlrich Hecht2016-10-171-0/+3
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* clk: renesas: r8a7796: Add CMT clocksBui Duc Phuc2016-09-121-0/+4
* clk: renesas: r8a7796: Add RAVB clockLaurent Pinchart2016-09-121-0/+1
* clk: renesas: r8a7796: Add THS/TSC clockKhiem Nguyen2016-09-051-0/+1
* clk: renesas: r8a7796: Add SDIF clocksSimon Horman2016-08-231-0/+10
* clk: renesas: r8a7796: Add GPIO clocksTakeshi Kihara2016-08-191-0/+8