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path: root/drivers/clk/renesas/r8a77965-cpg-mssr.c
Commit message (Expand)AuthorAgeFilesLines
* clk: renesas: rcar-gen3: Add ADG clocksKuninori Morimoto2023-08-151-0/+1
* clk: renesas: r8a77965: Add 3DGE and ZG supportGeert Uytterhoeven2023-07-271-0/+2
* clk: renesas: Move RPC core clocksGeert Uytterhoeven2022-04-131-5/+4
* clk: renesas: rcar-gen3: Add SDnH clockWolfram Sang2021-11-191-4/+8
* clk: renesas: r8a779[56]x: Add MLP clocksAndrey Gusakov2021-10-151-0/+1
* clk: renesas: r8a77965: Add DAB clockFabrizio Castro2021-03-081-0/+1
* clk: renesas: r8a77965: Add TMU clocksNiklas Söderlund2020-12-281-0/+5
* clk: renesas: rcar-gen3: Mark RWDT clocks as criticalUlrich Hecht2020-06-221-0/+1
* clk: renesas: r8a77965: Add RPC clocksDirk Behme2020-02-101-0/+8
* clk: renesas: rcar-gen3: Add CCREE clocksGeert Uytterhoeven2020-02-101-1/+3
* clk: renesas: r8a77965: Remove superfluous semicolonGeert Uytterhoeven2019-11-011-1/+1
* clk: renesas: r8a77965: Add CMM clocksJacopo Mondi2019-06-181-0/+3
* clk: renesas: r8a779{5|6|65}: Add TPU clockCao Van Dong2019-05-211-0/+1
* clk: renesas: rcar-gen3: Rename DRIF clocksTakeshi Kihara2019-04-021-8/+9
* clk: renesas: rcar-gen3: Correct parent clock of Audio-DMACTakeshi Kihara2019-04-021-2/+2
* clk: renesas: rcar-gen3: Correct parent clock of SYS-DMACTakeshi Kihara2019-04-021-2/+2
* clk: renesas: rcar-gen3: Correct parent clock of HS-USBKazuya Mizuguchi2019-04-021-1/+1
* clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCIKazuya Mizuguchi2019-04-021-2/+2
* clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offsetSimon Horman2019-04-021-1/+1
* clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisorTakeshi Kihara2019-04-021-1/+1
* clk: renesas: r8a77965: Add CPEX clockGeert Uytterhoeven2018-12-041-0/+1
* clk: renesas: r8a77965: Add FDP clockHoan Nguyen An2018-08-281-0/+1
* clk: renesas: r8a77965: Add SATA clockTakeshi Kihara2018-08-271-0/+1
* clk: renesas: r8a77965: Add OSC EXTAL predivider configurationGeert Uytterhoeven2018-08-271-33/+33
* clk: renesas: rcar-gen3: Rename rint to .rGeert Uytterhoeven2018-08-271-1/+2
* clk: renesas: r8a77965: Add MSIOF controller clocksTakeshi Kihara2018-04-161-0/+4
* clk: renesas: r8a77965: Replace DU2 clockJacopo Mondi2018-03-131-1/+1
* clk: renesas: cpg-mssr: Add support for R-Car M3-NJacopo Mondi2018-02-261-0/+334