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path: root/drivers/clk/samsung/clk-exynos5250.c
Commit message (Expand)AuthorAgeFilesLines
* clk: samsung: exynos5250: do not define number of clocks in bindingsKrzysztof Kozlowski2023-08-151-1/+4
* clk: samsung: Set dev in samsung_clk_init()Sam Protsenko2023-03-061-1/+1
* clk: samsung: Don't pass reg_base to samsung_clk_register_pll()Sam Protsenko2023-03-061-2/+1
* clk: samsung: Remove np argument from samsung_clk_init()Sam Protsenko2023-03-061-1/+1
* clk: samsung: Update CPU clk registrationWill McVicker2021-11-201-4/+7
* clk: samsung: remove __clk_lookup() usageMarek Szyprowski2021-11-191-5/+5
* clk: samsung: Use cached clk_hws instead of __clk_lookup() callsSylwester Nawrocki2020-09-171-1/+3
* clk: samsung: exynos5420/5250: Add IDs to the CPU parent clk definitionsSylwester Nawrocki2020-09-171-2/+2
* clk: samsung: Change signature of exynos5_subcmus_init() functionSylwester Nawrocki2019-08-081-1/+6
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-151-0/+1
* clk: samsung: exynos5250: Use generic helper for handling suspend/resumeMarek Szyprowski2018-10-051-40/+2
* clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devicesMarek Szyprowski2018-03-141-0/+6
* clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMUMarek Szyprowski2018-03-061-16/+35
* clk: samsung: Add compile time PLL rate validatorsAndrzej Hajda2018-02-231-27/+27
* clk: samsung: exynos5250: Fix PLL ratesAndrzej Hajda2018-02-231-4/+4
* clk: samsung: Remove clkdev alias support in Exynos5250 clk driverMarek Szyprowski2017-10-091-9/+9
* clk: samsung: exynos5250: Move sleep init function to init sectionKrzysztof Kozlowski2016-06-021-2/+2
* clk: samsung: exynos5250: Constify all clock initializersKrzysztof Kozlowski2016-06-021-10/+10
* clk: samsung: Remove useless check for return value of samsung_clk_initKrzysztof Kozlowski2016-06-021-2/+1
* clk: samsung: Remove CLK_IS_ROOTStephen Boyd2016-03-021-5/+5
* clk: samsung: exynos5250: Add DISP1 clocksTomeu Vizoso2015-10-241-1/+13
* Merge branch 'v4.3-topic/clk-samsung' of git://git.kernel.org/pub/scm/linux/k...Michael Turquette2015-07-281-0/+31
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| * clk: exynos5250: add cpu clock configuration data and instantiate cpu clockThomas Abraham2015-07-241-0/+31
* | clk: samsung: Properly include clk.h and clkdev.hStephen Boyd2015-07-201-2/+0
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* clk: samsung: Make of_device_id array constKrzysztof Kozlowski2014-07-261-1/+1
* clk: samsung: Register clk provider only after registering its all clocksSylwester Nawrocki2014-06-301-0/+2
* clk/exynos5250: fix bit number for tv sysmmu clockRahul Sharma2014-06-301-1/+1
* Merge tag 'samsung-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/gi...Olof Johansson2014-05-301-0/+35
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| * clk: exynos5250: Add missing sysmmu clocks for DISP and ISP blocksCho KyongHo2014-05-261-0/+35
* | ARM: EXYNOS: Move arm core power down clock to exynos5250 common clockAmit Daniel Kachhap2014-05-261-0/+42
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* clk: samsung: exynos5250: Add clocks for G3DArun Kumar K2014-05-141-1/+14
* clk: samsung: exynos5250/5420: Add gate clock for SSS moduleNaveen Krishna Chatradhi2014-05-141-0/+1
* clk/samsung: add support for multiple clock providersRahul Sharma2014-05-141-10/+15
* clk: samsung: Drop old suspend/resume codeTomasz Figa2014-02-141-1/+1
* clk: samsung: exynos5250: Move suspend/resume handling to SoC driverTomasz Figa2014-02-141-5/+44
* clk: exynos5250: add clock ID for div_pcm0Andrew Bresticker2014-01-081-1/+1
* clk: exynos5250: replace clock ID private enums with IDs from DT headerAndrzej Hajda2014-01-081-295/+264
* clk: exynos5250: register APLL rate tableAndrew Bresticker2014-01-081-1/+24
* clk: exynos5250: Add CLK_SET_RATE_PARENT flag to mout_apllSachin Kamat2013-12-301-1/+2
* clk: samsung: exynos5250: Fix parents of gate clocks from MFC domainTomasz Figa2013-12-301-3/+5
* clk: samsung: exynos5250: Correct parent list of audio muxesTomasz Figa2013-12-301-3/+3
* clk: samsung: exynos5250: Add missing unpopulated mux parentsTomasz Figa2013-12-301-4/+12
* clk: samsung: exynos5250: Fix parent of gate clocks from DISP1 domainTomasz Figa2013-12-301-6/+8
* clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domainTomasz Figa2013-12-301-8/+17
* clk: samsung: exynos5250: Make names of mux and div clocks consistentTomasz Figa2013-12-301-122/+123
* clk: samsung: exynos5250: Sort definitions by registers and bitfieldTomasz Figa2013-12-301-102/+188
* clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan2013-12-301-1/+2
* clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan2013-12-301-1/+4
* clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan2013-12-301-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 22:46:32 +0000