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path: root/drivers/clk/samsung/clk-exynos5420.c
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* clk: samsung: Pass register layout type explicitly to CLK_CPU()Sam Protsenko2024-02-251-4/+4
* clk: samsung: Pass actual CPU clock registers base to CPU_CLK()Sam Protsenko2024-02-251-8/+8
* clk: samsung: exynos5420: do not define number of clocks in bindingsKrzysztof Kozlowski2023-08-151-1/+4
* clk: samsung: Set dev in samsung_clk_init()Sam Protsenko2023-03-061-1/+1
* clk: samsung: Don't pass reg_base to samsung_clk_register_pll()Sam Protsenko2023-03-061-2/+1
* clk: samsung: Remove np argument from samsung_clk_init()Sam Protsenko2023-03-061-1/+1
* clk: samsung: Update CPU clk registrationWill McVicker2021-11-201-9/+18
* clk: samsung: remove __clk_lookup() usageMarek Szyprowski2021-11-191-1/+1
* clk: samsung: Use cached clk_hws instead of __clk_lookup() callsSylwester Nawrocki2020-09-171-4/+4
* clk: samsung: exynos5420/5250: Add IDs to the CPU parent clk definitionsSylwester Nawrocki2020-09-171-5/+6
* clk: samsung: exynos5420: Avoid __clk_lookup() calls when enabling clocksSylwester Nawrocki2020-09-171-4/+6
* clk: samsung: Keep top BPLL mux on Exynos542x enabledMarek Szyprowski2020-09-151-0/+5
* clk: samsung: Fix CLK_SMMU_FIMCL3 clock name on Exynos542xMarek Szyprowski2020-05-131-1/+1
* clk: samsung: Mark top ISP and CAM clocks on Exynos542x as criticalMarek Szyprowski2020-05-131-7/+9
* clk: samsung: exynos5420: Keep top G3D clocks enabledMarek Szyprowski2019-12-231-0/+8
* clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D pathMarek Szyprowski2019-10-291-8/+12
* clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/re...Marian Mihailescu2019-10-291-0/+2
* clk: samsung: exynos5420: Add VPLL rate tableMarian Mihailescu2019-10-291-0/+12
* clk: samsung: exynos5420: Preserve PLL configuration during suspend/resumeMarek Szyprowski2019-10-251-0/+6
* clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMUMarek Szyprowski2019-10-231-2/+19
* clk: samsung: exynos542x: Move MSCL subsystem clocks to its sub-CMUMarek Szyprowski2019-08-081-14/+34
* clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMUSylwester Nawrocki2019-08-081-11/+43
* clk: samsung: Change signature of exynos5_subcmus_init() functionSylwester Nawrocki2019-08-081-26/+34
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-171-7/+71
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| * clk: samsung: add new clocks for DMC for Exynos5422 SoCLukasz Luba2019-06-061-6/+55
| * clk: samsung: add BPLL rate table for Exynos 5422 SoCLukasz Luba2019-06-061-1/+16
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
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* clk: samsung: exynos5420: Enable PERIS clocks for suspendMarek Szyprowski2018-10-051-0/+1
* clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420Joonyoung Shim2018-10-051-2/+1
* clk: samsung: exynos5420: Use generic helper for handling suspend/resumeMarek Szyprowski2018-10-051-66/+6
* clk: samsung: exynos5420: Add more entries to EPLL rate tableSylwester Nawrocki2018-03-121-0/+3
* clk: samsung: exynos5420: Add CLK_SET_RATE_PARENT flag to mout_mau_epll_clkSylwester Nawrocki2018-03-121-1/+2
* clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMUMarek Szyprowski2018-03-061-26/+95
* clk: samsung: Add compile time PLL rate validatorsAndrzej Hajda2018-02-231-31/+31
* clk: samsung: Drop useless alias in Exynos5420 clk driverMarek Szyprowski2017-10-091-2/+1
* clk: samsung: Fix m2m scaler clock on Exynos542xAndrzej Pietrasiewicz2017-09-291-1/+1
* Merge tag 'clk-v4.14-samsung' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2017-08-231-8/+15
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| * clk: samsung: exynos542x: Enable clock rate propagation up to the EPLLSylwester Nawrocki2017-08-101-7/+8
| * clk: samsung: Fix mau_epll clock definition for exynos5422Sylwester Nawrocki2017-08-091-3/+9
* | clk: samsung: exynos5420: The EPLL rate table correctionsSylwester Nawrocki2017-07-311-8/+8
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* clk: samsung: exynos542x: Add EPLL rate tableSylwester Nawrocki2017-06-091-2/+17
* clk: samsung: Add missing exynos5420 audio related clocksSylwester Nawrocki2017-06-091-3/+7
* clk/samsung: exynos542x: mark some clocks as criticalMarek Szyprowski2017-01-091-7/+7
* clk: samsung: exynos5420: Add clocks for CMU_CDREX domainChanwoo Choi2016-09-091-0/+37
* clk: samsung: exynos5420: Set ID for aclk333 gate clockJavier Martinez Canillas2016-06-021-1/+1
* clk: samsung: exynos5420: Move sleep init function and PLL data to init sectionKrzysztof Kozlowski2016-06-021-3/+3
* clk: samsung: exynos5420: Constify all clock initializersKrzysztof Kozlowski2016-06-021-15/+15
* clk: samsung: Remove useless check for return value of samsung_clk_initKrzysztof Kozlowski2016-06-021-2/+0
* clk: samsung: exynos542x: Add the clock id for ACLKChanwoo Choi2016-04-151-30/+47
* clk: samsung: Remove CLK_IS_ROOTStephen Boyd2016-03-021-6/+6
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-20 10:56:02 +0000