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path: root/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
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* clk: sunxi-ng: Convert early providers to platform driversSamuel Holland2021-11-231-10/+30
* clk: sunxi-ng: Unregister clocks/resets when unbindingSamuel Holland2021-09-131-1/+1
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-171-12/+22
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| * clk: sunxi-ng: a33: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-181-12/+22
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner2019-06-051-9/+1
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* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-151-0/+1
* clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocksChen-Yu Tsai2018-12-051-3/+3
* clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLLChen-Yu Tsai2018-12-051-13/+24
* clk: Convert to using %pOF instead of full_nameRob Herring2017-07-211-2/+1
* clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai2017-06-071-5/+5
* Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd2017-04-191-7/+11
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| * clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factorChen-Yu Tsai2017-04-051-7/+11
* | clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai2017-04-131-0/+11
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* clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPUMaxime Ripard2017-01-271-1/+1
* clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-digMylène Josserand2017-01-171-1/+1
* clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33Icenowy Zheng2017-01-021-1/+1
* clk: sunxi-ng: fix PLL_CPUX adjusting on A33Icenowy Zheng2017-01-021-0/+10
* clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clockIcenowy Zheng2016-11-231-1/+1
* clk: sunxi-ng: Fix reset offset for the A23 and A33Maxime Ripard2016-09-201-8/+8
* clk: sunxi-ng: Add A33 CCU supportMaxime Ripard2016-09-101-0/+780