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* clk: sunxi-ng: Modify mismatched function nameZhang Jianhua2023-09-231-1/+1
* clk: sunxi-ng: h6: Fix clock divider range on some clocksAndre Przywara2021-03-041-4/+4
* clk: sunxi-ng: h6: Fix CEC clockAndre Przywara2021-03-041-1/+1
* clk: sunxi-ng: Make sure divider tables have sentinelJernej Skrabec2020-12-302-0/+2
* clk: sunxi-ng: add mux and pll notifiers for A64 CPU clockIcenowy Zheng2020-02-241-1/+27
* clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent orderSamuel Holland2020-02-051-2/+2
* clk: sunxi-ng: v3s: add the missing PLL_DDR1Icenowy Zheng2020-01-272-6/+19
* clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate registerOndrej Jirman2020-01-271-1/+1
* clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating itChen-Yu Tsai2020-01-271-1/+1
* clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai2019-12-131-1/+1
* clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki2019-12-131-1/+1
* clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18Colin Ian King2019-12-051-1/+1
* clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clockIcenowy Zheng2019-12-011-1/+6
* clk: sunxi-ng: h6: fix PWM gate/reset offsetRongyi Chen2019-11-201-1/+1
* clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng2019-10-071-0/+3
* clk: sunxi-ng: nkmp: Avoid GENMASK(-1, 0)Jernej Skrabec2019-05-251-5/+13
* clk: sunxi: A31: Fix wrong AHB gate numberAndre Przywara2019-03-231-2/+2
* clk: sunxi-ng: v3s: Fix TCON reset de-assert bitPaul Kocialkowski2019-03-231-1/+1
* clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocksChen-Yu Tsai2019-02-121-3/+3
* clk: sunxi-ng: Use u64 for calculation of NM rateJernej Skrabec2019-01-091-3/+15
* clk: sunxi-ng: h6: fix bus clocks' divider positionIcenowy Zheng2018-11-211-4/+4
* clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest settingChen-Yu Tsai2018-09-071-1/+9
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-08-153-35/+42
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| * clk: sunxi-ng: add A64 compatible stringIcenowy Zheng2018-06-271-7/+4
| * clk: sunxi-ng: r40: Export video PLLsJernej Skrabec2018-06-271-2/+6
| * clk: sunxi-ng: r40: Allow setting parent rate to display related clocksJernej Skrabec2018-06-271-4/+8
| * clk: sunxi-ng: r40: Add minimal rate for video PLLsJernej Skrabec2018-06-271-22/+24
* | clk: sunxi-ng: replace lib-y with obj-yMasahiro Yamada2018-06-211-24/+15
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* clk: sunxi-ng: r40: export a regmap to access the GMAC registerIcenowy Zheng2018-05-171-0/+33
* clk: sunxi-ng: r40: rewrite init code to a platform driverIcenowy Zheng2018-05-171-11/+28
* clk: sunxi-ng: add support for H6 PRCM CCUIcenowy Zheng2018-05-044-0/+232
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-04-1310-35/+1375
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| * clk: sunxi-ng: add missing hdmi-slow clock for H6 CCUIcenowy Zheng2018-03-212-1/+5
| * clk: sunxi-ng: add support for the Allwinner H6 CCUIcenowy Zheng2018-03-184-0/+1269
| * clk: sunxi-ng: Support fixed post-dividers on NKMP style clocksIcenowy Zheng2018-03-182-3/+19
| * clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEOJernej Skrabec2018-03-021-1/+3
| * clk: sunxi-ng: h3: h5: Allow some clocks to set parent rateJernej Skrabec2018-03-021-3/+6
| * clk: sunxi-ng: h3: h5: Add minimal rate for video PLLJernej Skrabec2018-03-021-11/+12
| * clk: sunxi-ng: Add check for minimal rate to NM PLLsJernej Skrabec2018-03-022-0/+34
| * clk: sunxi-ng: Use u64 for calculation of nkmp rateJernej Skrabec2018-02-151-3/+18
| * clk: sunxi-ng: Mask nkmp factors when setting registerJernej Skrabec2018-02-151-9/+12
| * clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig nameCorentin Labbe2018-02-131-7/+0
* | clk: sunxi-ng: a31: Fix CLK_OUT_* clock opsChen-Yu Tsai2018-02-191-3/+3
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*-. Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner...Stephen Boyd2018-01-267-43/+185
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| | * clk: sunxi-ng: a83t: Add M divider to TCON1 clockJernej Škrabec2018-01-031-2/+2
| | * clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCUIcenowy Zheng2017-12-291-3/+3
| | * clk: sunxi-ng: add support for Allwinner H3 DE2 CCUIcenowy Zheng2017-12-291-0/+47
| | * clk: sunxi-ng: sun8i: a83t: Use sigma-delta modulation for audio PLLChen-Yu Tsai2017-12-081-1/+10
| | * clk: sunxi-ng: sun8i: a83t: Add /2 fixed post divider to audio PLLChen-Yu Tsai2017-12-081-3/+6
| | * clk: sunxi-ng: Support fixed post-dividers on NM style clocksChen-Yu Tsai2017-12-082-13/+39
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