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path: root/drivers/clk/sunxi-ng
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* clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pllTobias Schramm2021-03-061-11/+22
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2021-02-227-7/+1272
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| * clk: sunxi-ng: Add support for the Allwinner H616 CCUAndre Przywara2021-01-284-0/+1212
| * clk: sunxi-ng: Add support for the Allwinner H616 R-CCUAndre Przywara2021-01-282-1/+49
| * clk: sunxi-ng: h6: Fix clock divider range on some clocksAndre Przywara2021-01-201-4/+4
| * clk: sunxi-ng: h6: Fix CEC clockAndre Przywara2021-01-061-1/+1
| * clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and resetSamuel Holland2021-01-062-1/+6
* | clk: sunxi-ng: mp: fix parent rate change flag checkJernej Skrabec2021-02-111-1/+1
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* clk: sunxi-ng: Make sure divider tables have sentinelJernej Skrabec2020-12-192-0/+2
* clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for audio PLLJernej Skrabec2020-08-251-13/+24
* clk: sunxi-ng: add support for the Allwinner A100 CCUYangtao Li2020-08-256-0/+1579
* clk: sunxi-ng: sun8i-de2: Sort structuresJernej Skrabec2020-02-121-10/+10
* clk: sunxi-ng: sun8i-de2: Add R40 specific quirksJernej Skrabec2020-02-121-0/+14
* clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83TJernej Skrabec2020-02-121-1/+11
* clk: sunxi-ng: sun8i-de2: Don't reuse A83T resetsJernej Skrabec2020-02-121-7/+16
* clk: sunxi-ng: sun8i-de2: H6 doesn't have rotate coreJernej Skrabec2020-02-121-56/+1
* clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A64Jernej Skrabec2020-02-121-3/+42
* clk: sunxi-ng: sun8i-de2: Split out H5 definitionsJernej Skrabec2020-02-121-1/+17
* clk: sunxi-ng: a64: Export MBUS clockJernej Skrabec2020-02-111-4/+0
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-02-035-8/+33
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| * clk: sunxi: a23/a33: Export the MIPI PLLMaxime Ripard2020-01-041-1/+3
| * clk: sunxi: a31: Export the MIPI PLLMaxime Ripard2020-01-041-1/+3
| * clk: sunxi-ng: a64: export CLK_CPUX clock for DVFSVasily Khoruzhick2020-01-041-1/+0
| * clk: sunxi-ng: add mux and pll notifiers for A64 CPU clockIcenowy Zheng2020-01-041-1/+27
| * clk: sunxi-ng: r40: Export MBUS clockChen-Yu Tsai2020-01-031-4/+0
* | clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent orderSamuel Holland2020-01-021-2/+2
* | clk: sunxi-ng: h6-r: Simplify R_APB1 clock definitionSamuel Holland2020-01-021-11/+1
* | clk: sunxi-ng: sun8i-r: Fix divider on APB0 clockSamuel Holland2020-01-021-18/+3
* | clk: sunxi-ng: r40: Allow setting parent rate for external clock outputsChen-Yu Tsai2019-12-181-2/+4
* | clk: sunxi-ng: v3s: Fix incorrect number of hw_clks.Yunhao Tian2019-12-092-4/+2
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-12-012-11/+16
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| * clk: sunxi-ng: h3: Export MBUS clockJernej Skrabec2019-11-051-4/+0
| * clk: sunxi-ng: h6: Allow GPU to change parent rateJernej Skrabec2019-10-021-1/+1
| * clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLLJernej Skrabec2019-09-301-6/+15
* | clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18Colin Ian King2019-10-291-1/+1
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*-. Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' i...Stephen Boyd2019-09-194-14/+255
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| | * clk: sunxi-ng: h6: Allow I2S to change parent rateJernej Skrabec2019-08-211-4/+4
| | * clk: sunxi-ng: v3s: add Allwinner V3 supportIcenowy Zheng2019-08-122-3/+227
| | * clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng2019-08-121-0/+3
| | * clk: sunxi-ng: v3s: add the missing PLL_DDR1Icenowy Zheng2019-07-222-6/+19
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| * clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registeredStephen Boyd2019-08-161-2/+3
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-1716-221/+397
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| * Merge tag 'sunxi-ng-parent-rewrite-part-1-take-2' of https://git.kernel.org/p...Stephen Boyd2019-06-2416-220/+396
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| | * clk: sunxi-ng: sun8i-r: Use local parent references for SUNXI_CCU_GATEChen-Yu Tsai2019-06-221-14/+23
| | * clk: sunxi-ng: a80-usb: Use local parent references for SUNXI_CCU_GATEChen-Yu Tsai2019-06-221-12/+20
| | * clk: sunxi-ng: gate: Add macros for referencing local clock parentsChen-Yu Tsai2019-06-221-0/+53
| | * clk: sunxi-ng: h6-r: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-1/+1
| | * clk: sunxi-ng: h6: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-25/+44
| | * clk: sunxi-ng: a64: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-15/+26
| | * clk: sunxi-ng: f1c100s: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai2019-06-221-10/+19
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 15:08:33 +0000