Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | clk: mxl: Fix a clk entry by adding relevant flags | Rahul Tanwar | 2022-10-17 | 1 | -0/+1 |
* | clk: mxl: Add option to override gate clks | Rahul Tanwar | 2022-10-17 | 1 | -0/+1 |
* | clk: mxl: Remove redundant spinlocks | Rahul Tanwar | 2022-10-17 | 1 | -6/+0 |
* | clk: mxl: Switch from direct readl/writel based IO to regmap based IO | Rahul Tanwar | 2022-10-17 | 1 | -17/+21 |
* | clk: intel: Add CGU clock driver for a new SoC | Rahul Tanwar | 2020-05-26 | 1 | -0/+335 |