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path: root/drivers/clk/zte/clk.h
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
* clk: move clock common macros out from vendor directoriesChunyan Zhang2017-12-211-18/+0
* clk: zte: pd_bit is not 0 on zx296718Shawn Guo2017-04-121-1/+5
* clk: zte: add audio clocks for zx296718Jun Nie2017-01-091-0/+21
* clk: zx: register ZX296718 clocksJun Nie2016-09-141-0/+125
* clk: zx: reform pll config info to ease code extensionJun Nie2016-09-141-0/+4
* clk: zx: Add audio div clock method for zx296702Jun Nie2015-07-281-0/+9
* clk: zx: add clock support to zx296702Jun Nie2015-06-111-0/+32