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path: root/drivers/clk/zynqmp
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* clk: Explicitly include correct DT includesRob Herring2023-07-191-1/+2
* clk: zynqmp: pll: Remove the limitShubhrajyoti Datta2023-03-271-2/+0
* clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rateQuanyang Wang2022-08-301-16/+15
* clk: zynqmp: Check the return type zynqmp_pm_query_dataShubhrajyoti Datta2022-08-221-2/+6
* clk: zynqmp: Add a check for NULL pointerShubhrajyoti Datta2022-08-221-2/+5
* clk: zynqmp: Replaced strncpy() with strscpy()Shubhrajyoti Datta2022-08-221-2/+2
* clk: zynqmp: Fix stack-out-of-bounds in strncpy`Ian Nam2022-08-221-0/+7
* clk: zynqmp: make bestdiv unsignedShubhrajyoti Datta2022-08-221-1/+1
* clk: zynqmp: replace warn_once with pr_debug for failed clock opsMichael Tretter2022-01-244-32/+32
*-. Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-rali...Stephen Boyd2021-09-014-6/+5
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| | * clk: zynqmp: Fix a memory leakShubhrajyoti Datta2021-08-281-1/+1
| | * clk: zynqmp: Check the return typeShubhrajyoti Datta2021-08-281-3/+1
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| * clk: zynqmp: Fix kernel-doc formatMichal Simek2021-08-281-2/+2
| * clk: zynqmp: fix kernel docRajan Vaja2021-08-281-0/+1
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* clk: zynqmp: Handle divider specific read only flagRajan Vaja2021-06-281-1/+9
* clk: zynqmp: Use firmware specific mux clock flagsRajan Vaja2021-06-282-1/+30
* clk: zynqmp: Use firmware specific divider clock flagsRajan Vaja2021-06-282-1/+33
* clk: zynqmp: Use firmware specific common clock flagsRajan Vaja2021-06-286-6/+52
* clk: zynqmp: pll: Remove some dead codeChristophe JAILLET2021-06-251-2/+0
* clk: zynqmp: fix compile testing without ZYNQMP_FIRMWAREMichal Simek2021-06-252-8/+24
* clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enableQuanyang Wang2021-04-071-1/+11
* clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callbackQuanyang Wang2021-04-071-6/+6
* clk: zynqmp: Drop dependency on ARCH_ZYNQMPPunit Agrawal2021-04-071-2/+1
* clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selectedPunit Agrawal2021-04-071-0/+1
* clk: zynqmp: divider: Add missing description for 'max_div'Lee Jones2021-02-111-0/+1
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-06-103-14/+38
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| * clk: zynqmp: Make zynqmp_clk_get_max_divisor staticYueHaibing2020-05-261-1/+1
| * clk: zynqmp: Update fraction clock check from custom type flagsTejas Patel2020-05-261-2/+4
| * clk: zynqmp: Add support for custom type flagsRajan Vaja2020-05-262-0/+5
| * clk: zynqmp: fix memory leak in zynqmp_register_clocksQuanyang Wang2020-05-261-6/+9
| * clk: zynqmp: Fix invalid clock name queriesRajan Vaja2020-05-261-0/+5
| * clk: zynqmp: Fix divider2 calculationTejas Patel2020-05-261-5/+12
| * clk: zynqmp: Limit bestdiv with maxdivRajan Vaja2020-05-261-0/+2
* | firmware: xilinx: Use APIs instead of IOCTLsRajan Vaja2020-04-281-10/+4
* | firmware: xilinx: Remove eemi ops for clock set/get parentRajan Vaja2020-04-281-4/+2
* | firmware: xilinx: Remove eemi ops for clock_getdividerRajan Vaja2020-04-282-5/+3
* | firmware: xilinx: Remove eemi ops for clock_setdividerRajan Vaja2020-04-282-4/+3
* | firmware: xilinx: Remove eemi ops for clock_getstateRajan Vaja2020-04-282-4/+2
* | firmware: xilinx: Remove eemi ops for clock_disableRajan Vaja2020-04-282-5/+2
* | firmware: xilinx: Remove eemi ops for clock_enableRajan Vaja2020-04-282-3/+2
* | firmware: xilinx: Remove eemi ops for query_dataRajan Vaja2020-04-282-13/+7
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* clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flagTejas Patel2020-01-231-5/+31
* clk: zynqmp: Fix divider calculationRajan Vaja2020-01-231-0/+46
* clk: zynqmp: Add support for get max dividerRajan Vaja2020-01-231-0/+36
* clk: zynqmp: Warn user if clock user are more than allowedRajan Vaja2020-01-231-2/+4
* clk: zynqmp: Extend driver for versalRajan Vaja2020-01-231-1/+2
* Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/s...Linus Torvalds2019-05-161-2/+2
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| * drivers: Defer probe if firmware is not readyRajan Vaja2019-03-181-2/+2
* | clk: zynqmp: use structs for clk query responsesMichael Tretter2019-04-192-77/+99
* | clk: zynqmp: fix check for fractional clockMichael Tretter2019-04-111-3/+6