summaryrefslogtreecommitdiffstats
path: root/drivers/clk
Commit message (Expand)AuthorAgeFilesLines
* clk: renesas: cpg-mssr: Fix reset control race conditionGeert Uytterhoeven2019-08-251-14/+2
* clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1Codrin Ciubotariu2019-08-251-0/+2
* clk: tegra210: fix PLLU and PLLU_OUT1JC Kuo2019-08-061-4/+4
* clk: ti: clkctrl: Fix returning uninitialized dataTony Lindgren2019-07-211-2/+5
* clk: ti: clkctrl: Fix clkdm_clk handlingTony Lindgren2019-06-221-4/+4
* clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288Douglas Anderson2019-06-151-0/+11
* clk: rockchip: Make rkpwm a critical clock on rk3288Douglas Anderson2019-05-311-1/+3
* clk: rockchip: Fix video codec clocks on rk3288Douglas Anderson2019-05-311-2/+2
* clk: rockchip: undo several noc and special clocks as critical on rk3288Douglas Anderson2019-05-311-9/+4
* clk: rockchip: fix wrong clock definitions for rk3328Jonas Karlman2019-05-251-9/+9
* clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides dividerDmitry Osipenko2019-05-251-2/+2
* clk: hi3660: Mark clk_gate_ufs_subsys as criticalLeo Yan2019-05-251-1/+5
* clk: x86: Add system specific quirk to mark clocks as criticalDavid Müller2019-05-081-3/+11
* clk: rockchip: fix frac settings of GPLL clock for rk3328Katsuhiro Suzuki2019-04-051-6/+6
* clk: fractional-divider: check parent rate only if flag is setKatsuhiro Suzuki2019-04-051-1/+1
* clk: ingenic: Fix doc of ingenic_cgu_div_infoPaul Cercueil2019-03-231-1/+1
* clk: ingenic: Fix round_rate misbehaving with non-integer dividersPaul Cercueil2019-03-231-5/+5
* clk: clk-twl6040: Fix imprecise external abort for pdmclkTony Lindgren2019-03-231-2/+51
* clk: uniphier: Fix update register for CPU-gearKunihiko Hayashi2019-03-231-1/+1
* clk: sunxi: A31: Fix wrong AHB gate numberAndre Przywara2019-03-231-2/+2
* clk: sunxi-ng: v3s: Fix TCON reset de-assert bitPaul Kocialkowski2019-03-231-1/+1
* clk: vc5: Abort clock configuration without upstream clockMarek Vasut2019-03-051-1/+3
* clk: imx6sl: ensure MMDC CH0 handshake is bypassedAnson Huang2019-02-121-0/+6
* clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocksChen-Yu Tsai2019-02-121-3/+3
* clk: boston: fix possible memory leak in clk_boston_setup()Yi Wang2019-02-121-3/+8
* clk: imx6q: reset exclusive gates on initLucas Stach2019-01-261-1/+5
* clk: imx: make mux parent strings constA.s. Dong2019-01-263-9/+13
* clk: rockchip: fix typo in rk3188 spdif_frac parentJohan Jonker2019-01-091-1/+1
* clk: mmp: Off by one in mmp_clk_add()Dan Carpenter2018-12-211-1/+1
* clk: mvebu: Off by one bugs in cp110_of_clk_get()Dan Carpenter2018-12-211-2/+2
* clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devicesMarek Szyprowski2018-12-011-0/+6
* clk: fixed-factor: fix of_node_get-put imbalanceRicardo Ribalda Delgado2018-11-271-0/+1
* clk: samsung: exynos5420: Enable PERIS clocks for suspendMarek Szyprowski2018-11-271-0/+1
* clk: fixed-rate: fix of_node_get-put imbalanceAlan Tull2018-11-271-0/+1
* reset: hisilicon: fix potential NULL pointer dereferenceGustavo A. R. Silva2018-11-211-3/+2
* clk: mvebu: use correct bit for 98DX3236 NANDChris Packham2018-11-211-1/+1
* clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent callEnric Balletbo i Serra2018-11-211-4/+0
* clk: at91: Fix division by zero in PLL recalc_rate()Ronald Wahl2018-11-211-0/+3
* clk: s2mps11: Fix matching when built as module and DT node contains compatibleKrzysztof Kozlowski2018-11-211-0/+30
* clk: x86: Stop marking clocks as CLK_IS_CRITICALHans de Goede2018-10-181-7/+0
* clk: x86: add "ether_clk" alias for Bay Trail / Cherry TrailHans de Goede2018-10-181-0/+11
* clk: tegra: bpmp: Don't crash when a clock fails to registerMikko Perttunen2018-09-261-3/+9
* clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failureRajan Vaja2018-09-261-1/+8
* clk: core: Potentially free connection idMikko Perttunen2018-09-261-0/+3
* clk: imx6ul: fix missing of_node_put()Nicholas Mc Guire2018-09-261-0/+1
* clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399Levin Du2018-09-151-0/+1
* clk: rockchip: fix clk_i2sout parent selection bits on rk3399Alberto Panizzo2018-09-051-1/+1
* clk: sunxi-ng: Fix missing CLK_SET_RATE_PARENT in ccu-sun4i-a10.cAlexander Syring2018-08-171-1/+1
* clk: at91: PLL recalc_rate() now using cached MUL and DIV valuesMarcin Ziemianowicz2018-07-031-12/+1
* clk: renesas: cpg-mssr: Stop using printk format %pCrGeert Uytterhoeven2018-07-031-4/+5