| Commit message (Expand) | Author | Age | Files | Lines |
* | mfd: Rohm PMICs: Use platform_device_id to match MFD sub-devices | Matti Vaittinen | 2020-01-24 | 1 | -1/+11 |
* | Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc | Linus Torvalds | 2019-12-05 | 2 | -1/+6 |
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| * | Merge tag 'mmp-soc-for-v5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/g... | Olof Johansson | 2019-10-21 | 2 | -1/+6 |
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| | * | ARM: mmp: add support for MMP3 SoC | Lubomir Rintel | 2019-10-17 | 2 | -1/+6 |
* | | | Merge branch 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/... | Linus Torvalds | 2019-12-05 | 3 | -3/+3 |
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| * | | | clk: qcom: Initialize clock drivers earlier | Amit Kucheria | 2019-11-07 | 3 | -3/+3 |
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* | | | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2019-12-01 | 115 | -2241/+7936 |
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| *-----. \ \ | Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' ... | Stephen Boyd | 2019-11-27 | 12 | -10/+1284 |
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| | | | | * | | clk: Add common clock driver for BM1880 SoC | Manivannan Sadhasivam | 2019-11-22 | 3 | -0/+977 |
| | | | | * | | clk: Add clk_hw_unregister_composite helper function definition | Manivannan Sadhasivam | 2019-11-22 | 1 | -0/+11 |
| | | | | * | | clk: Zero init clk_init_data in helpers | Manivannan Sadhasivam | 2019-11-22 | 5 | -5/+5 |
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| | | * | | | clk: mark clk_disable_unused() as __init | Rasmus Villemoes | 2019-11-19 | 1 | -4/+4 |
| | | * | | | clk: Fix memory leak in clk_unregister() | Kishon Vijay Abraham I | 2019-11-19 | 1 | -0/+1 |
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| | * | | | clk: ingenic: Allow drivers to be built with COMPILE_TEST | Stephen Boyd | 2019-11-22 | 1 | -1/+1 |
| | * | | | clk: Ingenic: Add CGU driver for X1000. | Zhou Yanjie | 2019-11-13 | 3 | -0/+285 |
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| *-------. \ \ | Merge branches 'clk-gpio-flags', 'clk-tegra', 'clk-rockchip', 'clk-sprd' and ... | Stephen Boyd | 2019-11-27 | 28 | -210/+1031 |
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| | | | | | * | | | clk: pxa: fix one of the pxa RTC clocks | Robert Jarzmik | 2019-11-13 | 1 | -0/+1 |
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| | | | | * / / | clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_... | Baolin Wang | 2019-11-13 | 1 | -1/+1 |
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| | | | * | | | clk: rockchip: protect the pclk_usb_grf as critical on px30 | Heiko Stuebner | 2019-11-05 | 1 | -1/+2 |
| | | | * | | | clk: rockchip: add video-related niu clocks as critical on px30 | Heiko Stuebner | 2019-11-05 | 1 | -5/+10 |
| | | | * | | | clk: rockchip: move px30 critical clocks to correct clock controller | Heiko Stuebner | 2019-11-05 | 1 | -4/+4 |
| | | | * | | | clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc | Finley Xiao | 2019-11-05 | 1 | -4/+40 |
| | | | * | | | clk: rockchip: make clk_half_divider_ops static | Ben Dooks (Codethink) | 2019-10-31 | 1 | -2/+1 |
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| | | * | | | clk: tegra: Use match_string() helper to simplify the code | YueHaibing | 2019-11-13 | 1 | -8/+4 |
| | | * | | | clk: tegra: Fix build error without CONFIG_PM_SLEEP | YueHaibing | 2019-11-11 | 1 | -0/+2 |
| | | * | | | clk: tegra: Optimize PLLX restore on Tegra20/30 | Dmitry Osipenko | 2019-11-11 | 2 | -18/+32 |
| | | * | | | clk: tegra: Add suspend and resume support on Tegra210 | Sowjanya Komatineni | 2019-11-11 | 3 | -4/+163 |
| | | * | | | clk: tegra: Share clk and rst register defines with Tegra clock driver | Sowjanya Komatineni | 2019-11-11 | 2 | -45/+45 |
| | | * | | | clk: tegra: Use fence_udelay() during PLLU init | Sowjanya Komatineni | 2019-11-11 | 1 | -4/+4 |
| | | * | | | clk: tegra: clk-dfll: Add suspend and resume support | Sowjanya Komatineni | 2019-11-11 | 3 | -0/+59 |
| | | * | | | clk: tegra: clk-super: Add restore-context support | Sowjanya Komatineni | 2019-11-11 | 1 | -0/+27 |
| | | * | | | clk: tegra: clk-super: Fix to enable PLLP branches to CPU | Sowjanya Komatineni | 2019-11-11 | 4 | -1/+39 |
| | | * | | | clk: tegra: periph: Add restore_context support | Sowjanya Komatineni | 2019-11-11 | 2 | -0/+37 |
| | | * | | | clk: tegra: Support for OSC context save and restore | Sowjanya Komatineni | 2019-11-11 | 2 | -0/+16 |
| | | * | | | clk: tegra: pll: Save and restore pll context | Sowjanya Komatineni | 2019-11-11 | 1 | -32/+54 |
| | | * | | | clk: tegra: pllout: Save and restore pllout context | Sowjanya Komatineni | 2019-11-11 | 1 | -0/+9 |
| | | * | | | clk: tegra: divider: Save and restore divider rate | Sowjanya Komatineni | 2019-11-11 | 1 | -0/+11 |
| | | * | | | clk: tegra: Reimplement SOR clocks on Tegra210 | Thierry Reding | 2019-11-11 | 1 | -16/+55 |
| | | * | | | clk: tegra: Reimplement SOR clock on Tegra124 | Thierry Reding | 2019-11-11 | 1 | -9/+13 |
| | | * | | | clk: tegra: Rename sor0_lvds to sor0_out | Thierry Reding | 2019-11-11 | 3 | -8/+8 |
| | | * | | | clk: tegra: Move SOR0 implementation to Tegra124 | Thierry Reding | 2019-11-11 | 2 | -8/+49 |
| | | * | | | clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC | Thierry Reding | 2019-11-11 | 2 | -2/+2 |
| | | * | | | Merge branch 'for-5.5/clk-core' into for-5.5/clk | Thierry Reding | 2019-11-11 | 1 | -0/+18 |
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| | | | * | | | clk: Add API to get index of the clock parent | Sowjanya Komatineni | 2019-11-11 | 1 | -0/+18 |
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| | | * / / | clk: tegra: Add Tegra20/30 EMC clock implementation | Dmitry Osipenko | 2019-11-11 | 5 | -52/+339 |
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| | * / / | clk: clk-gpio: propagate rate change to parent | Michael Hennerich | 2019-11-08 | 1 | -1/+1 |
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| *-------. \ \ | Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspee... | Stephen Boyd | 2019-11-27 | 32 | -297/+3480 |
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| | | | | | * | | | clk: aspeed: Add RMII RCLK gates for both AST2500 MACs | Andrew Jeffery | 2019-11-26 | 1 | -1/+26 |
| | | | | | * | | | clk: ast2600: Add RMII RCLK gates for all four MACs | Andrew Jeffery | 2019-11-08 | 1 | -1/+46 |
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| | | | | * / / | drivers/clk: convert VL struct to struct_size | Stephen Kitt | 2019-11-08 | 7 | -14/+9 |
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