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path: root/drivers/cxl/core
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* Merge branch 'for-6.3/cxl-autodetect-fixes' into for-6.4/cxlDan Williams2023-04-233-14/+40
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| * cxl/hdm: Add more HDM decoder debug messages at startupDan Williams2023-04-181-0/+12
| * cxl/port: Scan single-target ports for decodersDan Williams2023-04-181-2/+3
| * cxl/core: Drop unused io-64-nonatomic-lo-hi.hDan Williams2023-04-182-2/+0
| * cxl/hdm: Use 4-byte reads to retrieve HDM decoder base+limitDan Williams2023-04-181-7/+13
| * cxl/hdm: Fail upon detecting 0-sized decodersDan Williams2023-04-181-3/+12
* | Merge branch 'for-6.4/cxl-poison' into for-6.4/cxlDan Williams2023-04-236-7/+702
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| * | cxl/memdev: Trace inject and clear poison as cxl_poison eventsAlison Schofield2023-04-233-3/+22
| * | cxl/memdev: Warn of poison inject or clear to a mapped regionAlison Schofield2023-04-231-0/+59
| * | cxl/memdev: Add support for the Clear Poison mailbox commandAlison Schofield2023-04-231-0/+43
| * | cxl/memdev: Add support for the Inject Poison mailbox commandAlison Schofield2023-04-231-0/+56
| * | cxl/trace: Add an HPA to cxl_poison trace eventsAlison Schofield2023-04-232-2/+103
| * | cxl/region: Provide region info to the cxl_poison trace eventAlison Schofield2023-04-233-1/+141
| * | cxl/memdev: Add trigger_poison_list sysfs attributeAlison Schofield2023-04-231-0/+43
| * | cxl/trace: Add TRACE support for CXL media-error recordsAlison Schofield2023-04-233-1/+102
| * | cxl/mbox: Add GET_POISON_LIST mailbox commandAlison Schofield2023-04-231-0/+55
| * | cxl/mbox: Initialize the poison stateAlison Schofield2023-04-231-2/+79
| * | cxl/mbox: Restrict poison cmds to debugfs cxl_raw_allow_allAlison Schofield2023-04-231-0/+6
| * | cxl/mbox: Deprecate poison commandsDan Williams2023-04-221-5/+0
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* | cxl/port: Fix port to pci device assumptions in read_cdat_data()Dan Williams2023-04-221-6/+7
* | cxl/pci: Rightsize CDAT response allocationLukas Wunner2023-04-181-17/+19
* | cxl/pci: Simplify CDAT retrieval error pathDave Jiang2023-04-181-11/+12
* | cxl/pci: Use CDAT DOE mailbox created by PCI coreLukas Wunner2023-04-181-22/+5
* | cxl/pci: Use synchronous API for DOELukas Wunner2023-04-181-44/+22
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* Merge branch 'for-6.3/cxl-doe-fixes' into for-6.3/cxlDan Williams2023-04-041-15/+23
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| * cxl/pci: Handle excessive CDAT lengthLukas Wunner2023-04-031-0/+3
| * cxl/pci: Handle truncated CDAT entriesLukas Wunner2023-04-031-4/+9
| * cxl/pci: Handle truncated CDAT headerLukas Wunner2023-04-031-1/+1
| * cxl/pci: Fix CDAT retrieval on big endianLukas Wunner2023-03-211-13/+13
* | cxl/hdm: Extend DVSEC range register emulation for region enumerationDan Williams2023-04-041-5/+22
* | cxl/hdm: Limit emulation to the number of range registersDan Williams2023-04-041-36/+46
* | cxl/region: Move coherence tracking into cxl_region_attach()Dan Williams2023-04-041-2/+1
* | cxl/region: Fix region setup/teardown for RCDsDan Williams2023-04-041-1/+27
* | cxl/port: Fix find_cxl_root() for RCDs and simplify itDan Williams2023-04-043-35/+11
* | cxl/hdm: Skip emulation when driver manages mem_enableDan Williams2023-04-041-13/+18
* | cxl/hdm: Fix double allocation of @cxlhdmDan Williams2023-04-041-28/+6
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* Merge tag 'cxl-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds2023-02-2510-260/+2088
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| * Merge branch 'for-6.3/cxl-events' into cxl/nextDan Williams2023-02-163-51/+66
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| | * cxl/trace: Add serial number to trace pointsIra Weiny2023-02-161-10/+18
| | * cxl/trace: Add host output to trace pointsIra Weiny2023-02-161-10/+21
| | * cxl/trace: Standardize device information outputIra Weiny2023-02-163-48/+44
| * | Merge branch 'for-6.3/cxl-rr-emu' into cxl/nextDan Williams2023-02-142-118/+201
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| | * | cxl/pci: Remove locked check for dvsec_range_allowed()Dave Jiang2023-02-141-2/+0
| | * | cxl/hdm: Add emulation when HDM decoders are not committedDave Jiang2023-02-141-0/+29
| | * | cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decodersDave Jiang2023-02-142-13/+54
| | * | cxl/hdm: Emulate HDM decoder from DVSEC range registersDave Jiang2023-02-142-4/+34
| | * | cxl/pci: Refactor cxl_hdm_decode_init()Dave Jiang2023-02-141-81/+54
| | * | cxl/port: Export cxl_dvsec_rr_decode() to cxl_portDave Jiang2023-02-141-11/+7
| | * | cxl/pci: Break out range register decoding from cxl_hdm_decode_init()Dave Jiang2023-02-141-24/+40
| * | | Merge branch 'for-6.3/cxl-ram-region' into cxl/nextDan Williams2023-02-141-3/+2
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