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path: root/drivers/cxl/pci.c
Commit message (Expand)AuthorAgeFilesLines
* cxl/pci: Fix debug message in cxl_probe_regs()Li Qiang (Johnny Li)2021-09-071-2/+2
* cxl/pci: Fix lockdown levelDan Williams2021-09-071-1/+1
* cxl/mem: Adjust ram/pmem range to represent DPA rangesIra Weiny2021-08-101-8/+6
* cxl/mem: Account for partitionable space in ram/pmem rangesIra Weiny2021-08-101-5/+91
* cxl/pci: Store memory capacity valuesIra Weiny2021-08-071-3/+33
* cxl/pci: Simplify register setupBen Widawsky2021-08-061-26/+12
* cxl/pci: Ignore unknown register block typesBen Widawsky2021-08-061-8/+12
* cxl/core: Move memdev management to coreBen Widawsky2021-08-061-227/+1
* cxl/pci: Introduce cdevm_file_operationsDan Williams2021-08-061-27/+38
* cxl: Move cxl_core to new directoryBen Widawsky2021-08-061-1/+1
* cxl/pci: Rename CXL REGLOC IDBen Widawsky2021-06-171-1/+1
* cxl/pmem: Register 'pmem' / cxl_nvdimm devicesDan Williams2021-06-151-6/+17
* cxl/pci: Add media provisioning required commandsBen Widawsky2021-06-141-0/+19
* cxl/pci: Add HDM decoder capabilitiesBen Widawsky2021-06-051-0/+15
* cxl/pci: Reserve individual register block regionsIra Weiny2021-06-051-0/+2
* cxl/pci: Map registers based on capabilitiesIra Weiny2021-06-051-21/+90
* cxl/pci: Reserve all device regions at onceIra Weiny2021-06-051-7/+11
* cxl/pci: Introduce cxl_decode_register_block()Ira Weiny2021-06-051-8/+18
* cxl/mem: Get rid of @cxlm.baseBen Widawsky2021-05-261-13/+11
* cxl/mem: Move register locator logic into reg setupBen Widawsky2021-05-261-67/+68
* cxl/mem: Split creation from mapping in probeBen Widawsky2021-05-261-24/+40
* cxl/mem: Use dev instead of pdev->devBen Widawsky2021-05-261-1/+1
* cxl/pci.c: Add a 'label_storage_size' attribute to the memdevVishal Verma2021-05-261-0/+12
* cxl: Rename mem to pciBen Widawsky2021-05-261-0/+1524