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path: root/drivers/cxl/port.c
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* cxl: Refactor to use __free() for cxl_root allocation in cxl_endpoint_port_pr...Dave Jiang2024-01-051-3/+2
* cxl: Convert find_cxl_root() to return a 'struct cxl_root *'Dave Jiang2024-01-051-1/+3
* cxl: Add callback to parse the SSLBIS subtable from CDATDave Jiang2023-12-221-0/+2
* cxl: Add callback to parse the DSMAS subtables from CDATDave Jiang2023-12-221-0/+1
* cxl: Add support for reading CXL switch CDAT tableDave Jiang2023-10-271-0/+3
* Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams2023-06-251-2/+5
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| * cxl/regs: Remove early capability checks in Component Register setupRobert Richter2023-06-251-1/+4
| * cxl: Rename 'uport' to 'uport_dev'Dan Williams2023-06-251-1/+1
* | Revert "cxl/port: Enable the HDM decoder capability for switch ports"Dan Williams2023-06-251-9/+5
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* cxl: Move cxl_await_media_ready() to before capacity info retrievalDave Jiang2023-05-181-6/+0
* cxl/port: Enable the HDM decoder capability for switch portsDan Williams2023-05-181-5/+9
* cxl/port: Scan single-target ports for decodersDan Williams2023-04-181-5/+13
* cxl/port: Fix find_cxl_root() for RCDs and simplify itDan Williams2023-04-041-1/+1
* cxl/hdm: Skip emulation when driver manages mem_enableDan Williams2023-04-041-1/+1
* Merge branch 'for-6.3/cxl-rr-emu' into cxl/nextDan Williams2023-02-141-5/+10
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| * cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decodersDave Jiang2023-02-141-1/+1
| * cxl/hdm: Emulate HDM decoder from DVSEC range registersDave Jiang2023-02-141-1/+1
| * cxl/port: Export cxl_dvsec_rr_decode() to cxl_portDave Jiang2023-02-141-7/+13
* | cxl/region: Add region autodiscoveryDan Williams2023-02-101-1/+46
* | cxl/port: Split endpoint and switch port probeDan Williams2023-02-101-30/+39
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* cxl/port: Read CDAT tableIra Weiny2022-07-191-0/+53
* cxl/port: Reuse 'struct cxl_hdm' context for hdm initDan Williams2022-05-191-11/+14
* cxl/port: Move endpoint HDM Decoder Capability init to port driverDan Williams2022-05-191-0/+11
* cxl/core/port: Add endpoint decodersBen Widawsky2022-02-081-8/+9
* cxl/mem: Add the cxl_mem driverBen Widawsky2022-02-081-0/+12
* cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams2022-02-081-4/+4
* cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky2022-02-081-0/+63
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