summaryrefslogtreecommitdiffstats
path: root/drivers/dma/dw
Commit message (Expand)AuthorAgeFilesLines
* dmaengine: dw: platform: Convert to platform remove callback returning voidUwe Kleine-König2023-09-281-4/+2
* dmaengine: Explicitly include correct DT includesRob Herring2023-08-011-1/+3
* dmaengine: dw: Move check for paused channel to dwc_get_residue()Andy Shevchenko2023-02-161-6/+5
* Merge tag 'dmaengine-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2022-08-041-0/+3
|\
| * dmaengine: dw: dmamux: Fix build without CONFIG_OFMiquel Raynal2022-06-101-0/+2
| * dmaengine: dw: dmamux: Export the module device tableMiquel Raynal2022-06-101-0/+1
* | dma:dw: remove reference to AVR32 architecture in core.cHans-Christian Noren Egtvedt2022-08-031-3/+0
|/
* dmaengine: dw: Add RZN1 compatibleMiquel Raynal2022-05-191-0/+1
* dmaengine: dw: dmamux: Introduce RZN1 DMA router supportMiquel Raynal2022-05-193-0/+166
* dmaengine: dw: switch from 'pci_' to 'dma_' APIQing Wang2021-10-261-5/+1
* dmaengine: dw: Simplify DT property parserAndy Shevchenko2021-08-061-28/+16
* dmaengine: dw: Remove error message from DT parsing codeAndy Shevchenko2021-08-061-5/+0
* dmaengine: dw: Program xBAR hardware for Elkhart LakeAndy Shevchenko2021-07-144-9/+157
* dmaengine: dw: Make it dependent to HAS_IOMEMAndy Shevchenko2021-04-121-0/+2
* dmaengine dw: Revert "dmaengine: dw: Enable runtime PM"Cezary Rojewski2021-02-081-6/+0
* dmaengine: dw: Enable runtime PMAndy Shevchenko2020-11-091-0/+6
* dmaengine: dw: convert tasklets to use new tasklet_setup() APIAllen Pais2020-09-181-3/+3
* dmaengine: dw: Add DMA-channels mask cell supportSerge Semin2020-08-172-2/+9
* dmaengine: dw: Ignore burst setting for memory peripheralsSerge Semin2020-08-172-6/+4
* dmaengine: dw: Discard dlen from the dev-to-mem xfer width calculationSerge Semin2020-08-171-1/+1
* dmaengine: dw: Activate FIFO-mode for memory peripherals onlySerge Semin2020-08-171-1/+1
* Merge branch 'for-linus' into fixesVinod Koul2020-08-056-4/+64
|\
| * dmaengine: dw: Initialize max_sg_burst capabilitySerge Semin2020-07-271-0/+12
| * dmaengine: dw: Introduce max burst length hw configSerge Semin2020-07-273-0/+23
| * dmaengine: dw: Initialize min and max burst DMA device capabilitySerge Semin2020-07-271-0/+2
| * dmaengine: dw: Set DMA device max segment size parameterSerge Semin2020-07-271-0/+7
| * dmaengine: dw: Take HC_LLP flag into account for noLLP auto-configSerge Semin2020-07-272-1/+11
| * dmaengine: dw: Replace 'objs' by 'y'Andy Shevchenko2020-06-161-2/+2
| * dmaengine: dw: Register ACPI DMA controller for PCI that has companionAndy Shevchenko2020-06-163-1/+7
* | dmaengine: dw: Initialize channel before each transferAndy Shevchenko2020-07-061-12/+0
|/
* dmaengine: dw: platform: Mark 'hclk' clock optionalAndy Shevchenko2019-10-141-1/+1
* dmaengine: dw: platform: Split OF helpers to separate moduleAndy Shevchenko2019-08-214-113/+149
* dmaengine: dw: platform: Split ACPI helpers to separate moduleAndy Shevchenko2019-08-214-53/+63
* dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()Andy Shevchenko2019-08-211-4/+8
* dmaengine: dw: platform: Switch to acpi_dma_controller_register()Andy Shevchenko2019-08-211-2/+12
* dmaengine: dw: platform: Use devm_platform_ioremap_resource()Andy Shevchenko2019-08-211-3/+1
* dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart LakeAndy Shevchenko2019-08-211-5/+11
* dmaengine: dw: platform: Use struct dw_dma_chip_pdataAndy Shevchenko2019-08-211-11/+31
* dmaengine: dw: Export struct dw_dma_chip_pdata for wider useAndy Shevchenko2019-08-212-44/+44
* dmaengine: dw: Update Intel Elkhart Lake Service Engine acronymJarkko Nikula2019-08-201-1/+1
* dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart LakeAndy Shevchenko2019-06-251-0/+5
* dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bitAndy Shevchenko2019-06-251-8/+20
* Merge branch 'topic/dw' into for-linusVinod Koul2019-03-129-247/+419
|\
| * dmaengine: dw: convert to SPDX identifiersAndy Shevchenko2019-01-076-20/+7
| * dmaengine: dw: Don't pollute CTL_LO on iDMA 32-bitAndy Shevchenko2019-01-074-26/+47
| * dmaengine: dw: Reset DRAIN bit when resume the channelAndy Shevchenko2019-01-074-7/+25
| * dmaengine: dw: Split DW and iDMA 32-bit operationsAndy Shevchenko2019-01-078-179/+339
| * dmaengine: dw: Remove unused internal propertyAndy Shevchenko2019-01-073-10/+1
| * dmaengine: dw: Remove misleading is_private propertyAndy Shevchenko2019-01-073-7/+1
| * dmaengine: dw: Add missed multi-block support for iDMA 32-bitAndy Shevchenko2019-01-071-0/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 02:20:08 +0000