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path: root/drivers/edac/amd64_edac.c
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* EDAC/amd64: Handle three rank interleaving modeYazen Ghannam2021-10-071-1/+21
* EDAC/amd64: Use DEVICE_ATTR helper macrosDwaipayan Ray2021-07-131-13/+8
* x86/msr: Rename MSR_K8_SYSCFG to MSR_AMD64_SYSCFGBrijesh Singh2021-05-101-1/+1
* EDAC/amd64: Issue probing messages only on properly detected hardwareBorislav Petkov2021-01-221-7/+7
* EDAC/amd64: Limit error injection functionality to supported hwBorislav Petkov2020-12-281-3/+5
* EDAC/amd64: Merge error injection sysfs facilitiesBorislav Petkov2020-12-281-4/+231
* EDAC/amd64: Merge sysfs debugging attributes setup codeBorislav Petkov2020-12-281-6/+59
* EDAC/amd64: Tone down messages about missing PCI IDsYazen Ghannam2020-12-281-4/+4
* EDAC/amd64: Do not load on family 0x15, model 0x13Borislav Petkov2020-12-281-3/+7
* Merge tag 'x86_cpu_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2020-12-141-2/+2
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| * x86/CPU/AMD: Remove amd_get_nb_id()Yazen Ghannam2020-11-191-2/+2
* | EDAC/amd64: Fix PCI component registrationBorislav Petkov2020-11-271-12/+14
* | EDAC/amd64: Remove unneeded breaksTom Rix2020-10-261-8/+0
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* Merge tag 'edac_updates_for_v5.10' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2020-10-121-0/+6
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| * EDAC/amd64: Set proper family type for Family 19h Models 20h-2FhYazen Ghannam2020-10-091-0/+6
* | treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-231-1/+1
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* EDAC/amd64: Read back the scrub rate PCI register on F15hBorislav Petkov2020-06-181-0/+2
* Merge branch 'x86/entry' into ras/coreThomas Gleixner2020-06-111-1/+1
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| * EDAC/amd64: Remove redundant assignment to variable ret in hw_info_get()Colin Ian King2020-05-291-1/+1
* | EDAC/amd64: Add AMD family 17h model 60h PCI IDsAlexander Monakov2020-05-221-0/+14
* | x86/mce/amd, edac: Remove report_gart_errorsBorislav Petkov2020-04-141-8/+0
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* EDAC: Convert to new X86 CPU match macrosThomas Gleixner2020-03-241-7/+7
* Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2020-01-271-26/+36
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| * EDAC/amd64: Drop some family checks for newer systemsYazen Ghannam2020-01-161-26/+19
| * EDAC/amd64: Add family ops for Family 19h Models 00h-0FhYazen Ghannam2020-01-161-0/+17
* | EDAC/amd64: Do not warn when removing instancesBorislav Petkov2020-01-171-3/+0
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* EDAC/amd64: Get rid of the ECC disabled long messageBorislav Petkov2019-11-091-16/+3
* EDAC/amd64: Check for memory before fully initializing an instanceYazen Ghannam2019-11-061-3/+22
* EDAC/amd64: Use cached data when checking for ECCYazen Ghannam2019-11-061-12/+8
* EDAC/amd64: Save max number of controllers to family typeYazen Ghannam2019-11-061-30/+14
* EDAC/amd64: Gather hardware information earlyYazen Ghannam2019-11-061-50/+51
* EDAC/amd64: Make struct amd64_family_type globalYazen Ghannam2019-11-061-7/+5
* EDAC/amd64: Set grain per DIMMYazen Ghannam2019-10-251-0/+2
* EDAC/amd64: Add PCI device IDs for family 17h, model 70hIsaac Vaughn2019-09-071-0/+13
* EDAC/amd64: Support asymmetric dual-rank DIMMsYazen Ghannam2019-08-231-3/+13
* EDAC/amd64: Cache secondary Chip Select registersYazen Ghannam2019-08-231-3/+20
* EDAC/amd64: Decode syndrome before translating addressYazen Ghannam2019-08-231-7/+7
* EDAC/amd64: Find Chip Select memory size using Address MaskYazen Ghannam2019-08-231-44/+70
* EDAC/amd64: Initialize DIMM info for systems with more than two channelsYazen Ghannam2019-08-231-14/+52
* EDAC/amd64: Recognize DRAM device type ECC capabilityYazen Ghannam2019-08-231-2/+12
* EDAC/amd64: Support more than two controllers for chip selects handlingYazen Ghannam2019-08-221-55/+68
* treewide: Add SPDX license identifier for more missed filesThomas Gleixner2019-05-211-0/+1
* Revert "EDAC/amd64: Support more than two controllers for chip select handling"Borislav Petkov2019-04-251-59/+54
* EDAC/amd64: Adjust printed chip select sizes when interleavedYazen Ghannam2019-03-271-2/+29
* EDAC/amd64: Support more than two controllers for chip select handlingYazen Ghannam2019-03-271-54/+59
* EDAC/amd64: Recognize x16 symbol sizeYazen Ghannam2019-03-271-11/+10
* EDAC/amd64: Set maximum channel layer size depending on familyYazen Ghannam2019-03-271-1/+7
* EDAC/amd64: Support more than two Unified Memory ControllersYazen Ghannam2019-03-271-17/+30
* EDAC/amd64: Use a macro for iterating over Unified Memory ControllersYazen Ghannam2019-03-271-7/+10
* EDAC/amd64: Add Family 17h Model 30h PCI IDsYazen Ghannam2019-03-271-0/+13
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