Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | fpga manager: xilinx-spi: check INIT_B pin during write_init | Luca Ceresoli | 2020-06-26 | 1 | -1/+54 |
* | fpga manager: xilinx-spi: remove unneeded, mistyped variables | Luca Ceresoli | 2020-06-18 | 1 | -4/+2 |
* | fpga manager: xilinx-spi: valid for the 7 Series too | Luca Ceresoli | 2020-06-18 | 1 | -1/+1 |
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 | Thomas Gleixner | 2019-06-05 | 1 | -4/+1 |
* | fpga: mgr: add devm_fpga_mgr_create | Alan Tull | 2018-10-16 | 1 | -8/+4 |
* | fpga: manager: change api, don't use drvdata | Alan Tull | 2018-05-25 | 1 | -3/+17 |
* | fpga manager: Add Xilinx slave serial SPI driver | Anatolij Gustschin | 2017-04-08 | 1 | -0/+198 |