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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
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* drm/amdgpu: set sw state to gfxoff after SR-IOV resetHorace Chen2023-07-251-0/+1
* drm/amdgpu: Add RLCG interface driver implementation for gfx v9.4.3 (v3)Victor Lu2023-07-181-2/+2
* drm/amdgpu/vcn: custom video info caps for sriovJane Jian2023-03-141-0/+4
* drm/amdgpu: add RAS poison consumption handler for AI SRIOVTao Zhou2022-12-151-0/+1
* drm/amdgpu: Fix type of second parameter in trans_msg() callbackNathan Chancellor2022-11-041-1/+4
* drm/amdgpu: set vm_update_mode=0 as default for Sienna Cichlid in SRIOV caseDanijel Slivka2022-10-171-0/+4
* drm/amdgpu: Support PSP 13.0.10 on SR-IOVHorace Chen2022-09-011-0/+3
* drm/amdgpu: refine virtualization psp fw skip checkHorace Chen2022-09-011-0/+2
* drm/amdgpu: Fix wait for RLCG command completionVictor Skvortsov2022-02-161-0/+2
* drm/amdgpu: add determine passthrough under arm64Victor Zhao2022-01-271-1/+3
* drm/amdgpu: retire rlc callbacks sriov_rreg/wregHawking Zhang2022-01-251-2/+0
* drm/amdgpu: add helper for rlcg indirect reg accessHawking Zhang2022-01-251-1/+13
* drm/amdgpu: add helper to query rlcg reg access flagHawking Zhang2022-01-251-0/+8
* drm/amdgpu: Separate vf2pf work item init from virt data exchangeVictor Skvortsov2021-12-161-0/+1
* drm/amdgpu: Complete multimedia bandwidth interfaceBokun Zhang2021-05-191-0/+13
* drm/amdgpu: indirect register access for nv12 sriovPeng Ju Zhou2021-04-091-0/+17
* drm/amdgpu: indirect register access for nv12 sriovPeng Ju Zhou2021-04-091-3/+3
* drm/amdgpu: Add new PF2VF flags for VF register access methodRohit Khaire2021-04-091-0/+11
* drm/amdgpu: Implement new guest side VF2PF message transaction (v2)Bokun Zhang2020-09-251-69/+6
* drm/amdgpu: Update VF2PF interfaceBokun Zhang2020-09-251-20/+9
* drm/amdgpu: refine codes to avoid reentering GPU recoveryDennis Li2020-08-241-2/+2
* drm/amdgpu: revert "fix system hang issue during GPU reset"Christian König2020-08-141-2/+2
* drm/amdgpu: fix system hang issue during GPU resetDennis Li2020-07-271-2/+2
* drm/amdgpu: support reserve bad page for virt (v3)Stanley.Yang2020-07-011-4/+26
* drm/amdgpu: add amdgpu_virt_get_vf_mode helper functionKevin Wang2020-05-181-0/+8
* drm/amdgpu: resume kiq access debugfsYintian Tao2020-04-131-0/+2
* drm/amdgpu: restrict debugfs register access under SR-IOVYintian Tao2020-04-131-0/+7
* drm/amdgpu: introduce new request and its functionMonk Liu2020-04-011-0/+3
* drm/amdgpu: cleanup all virtualization detection routineMonk Liu2020-04-011-0/+6
* drm/amdgpu: amends feature bits for MM bandwidth mgrMonk Liu2020-04-011-0/+2
* drm/amdgpu: revise RLCG access pathMonk Liu2020-03-161-0/+3
* drm/amdgpu: provide a generic function interface for reading/writing register...chen gong2020-01-221-2/+0
* drm/amd/powerplay: enable pp one vf mode for vega10Yintian Tao2019-12-111-10/+4
* drm/amdgpu: cleanup vega10 SRIOV code pathMonk Liu2019-08-021-13/+0
* drm/amdgpu: program for resuming preempted ibJack Xiao2019-06-211-0/+1
* drm/amdgpu: init vega10 SR-IOV reg access modeTrigger Huang2019-05-241-0/+13
* drm/amdgpu: support dpm level modification under virtualization v3Yintian Tao2019-04-101-0/+11
* drm/amd/amdgpu/sriov: Aligned the definition with libgvEmily Deng2018-11-191-10/+14
* drm/amdgpu: cleanup GMC v9 TLB invalidationChristian König2018-11-051-0/+3
* drm/amdgpu: Move csa related code to separate fileRex Zhu2018-11-051-11/+0
* drm/amdgpu: Refine CSA related functionsRex Zhu2018-11-051-3/+5
* drm/amdgpu: Remove useless csa gpu address in vmid0Rex Zhu2018-11-051-1/+0
* drm/amdgpu: move static CSA address to top of address space v2Christian König2018-02-191-2/+3
* drm/amdgpu:free CSA in unified placeMonk Liu2017-12-061-0/+1
* drm/amdgpu:read VRAMLOST from gimMonk Liu2017-12-041-0/+3
* drm/amdgpu:cleanup in_sriov_reset and lock_resetMonk Liu2017-12-041-1/+0
* drm/amdgpu:implement new GPU recover(v3)Monk Liu2017-12-041-1/+0
* drm/amdgpu/virt: add wait_reset virt opspding2017-12-041-0/+2
* drm/amdgpu/virt: add function to check MMIO (v2)pding2017-12-041-0/+1
* drm/amdgpu: SR-IOV data exchange between PF&VFHorace Chen2017-10-191-0/+178
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