summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/soc15.h
Commit message (Expand)AuthorAgeFilesLines
* drm/amdgpu: Read aquavanjaram PCIE register stateLijo Lazar2023-11-291-0/+4
* drm/amdgpu: Add soc config init for GC9.4.3 ASICsLijo Lazar2023-06-091-0/+1
* drm/amdgpu: add helpers to access registers on different AIDsLe Ma2023-06-091-0/+1
* drm/amdgpu: switch to aqua_vanjaram_doorbell_index_initLe Ma2023-06-091-0/+1
* drm/amdgpu: Add IP instance map for aqua vanjaramLijo Lazar2023-06-091-0/+1
* drm/amdgpu: add xcc index argument to soc15_grbm_selectLe Ma2023-04-181-1/+1
* drm/amdgpu: drop soc15_set_ip_blocks()Alex Deucher2021-10-201-1/+0
* drm/amdgpu/soc15: export common IP functionsAlex Deucher2021-10-041-0/+2
* drm/amdgpu: make soc15_common_ip_funcs staticAlex Deucher2021-09-231-2/+0
* drm/amdgpu: refine ras codes for GC utc of aldebaranDennis Li2021-03-231-1/+1
* drm/amdgpu: add ras support for gfx of aldebaranDennis Li2021-03-231-0/+11
* drm/amdgpu: add register base init for aldebaran (v2)Le Ma2021-03-101-0/+1
* drm/amdgpu: request init data in virt detectionWenhui Sheng2020-07-021-0/+1
* drm/amdgpu: revise RLCG access pathMonk Liu2020-03-161-0/+7
* drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10changzhu2019-11-221-2/+2
* drm/amdgpu: define soc15_ras_field_entry for reuseDennis Li2019-11-221-0/+12
* drm/amdgpu: change to query the actual EDC counterDennis Li2019-10-151-0/+2
* drm/amdgpu: dynamically initialize IP offset for ArcturusLe Ma2019-07-181-0/+1
* drm/amdgpu: avoid to use SOC15_REG_OFFSET in static array for navi10Hawking Zhang2019-06-211-0/+8
* drm/amdgpu: Fixed missing to clear some EDC countJames Zhu2019-06-111-0/+2
* drm/amdgpu: add gfx9 gpr EDC workaround when RAS is enabledJames Zhu2019-05-241-0/+10
* drm/amdgpu: Doorbell layout for vega20 and future asicOak Zeng2018-11-281-0/+1
* drm/amdgpu: Vega10 doorbell index initializationOak Zeng2018-11-281-0/+1
* drm/amdgpu: Add nbio 7.4 support for vega20 (v3)Feifei Xu2018-08-271-0/+1
* drm/amdgpu/soc15: dynamic initialize ip offset for vega20Feifei Xu2018-05-171-0/+1
* drm/amdgpu: move waiting for VM flush into gmc_v9_0_emit_flush_gpu_tlbChristian König2018-02-191-1/+2
* drm/amdgpu: add PASID mapping for GMC v9Christian König2018-02-191-1/+1
* drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlbChristian König2018-02-191-0/+2
* drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu2017-12-081-0/+18
* drm/amdgpu: Dynamic initialize IP base offsetShaoyun Liu2017-12-081-0/+2
* drm/amdgpu: apply nbio7 for Raven (v3)Chunming Zhou2017-05-241-0/+1
* drm/amdgpu: add common soc15 headersKen Wang2017-03-291-0/+35