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path: root/drivers/gpu/drm/amd/amdgpu/soc15_common.h
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* drm/amdgpu: Add RLCG interface driver implementation for gfx v9.4.3 (v3)Victor Lu2023-07-181-33/+33
* drm/amdgpu: convert logical instance mask to physical oneTao Zhou2023-06-091-1/+6
* drm/amdgpu: fixes a JPEG get write/read pointer bugSonny Jiang2023-06-091-1/+2
* drm/amdgpu: add helpers to access registers on different AIDsLe Ma2023-06-091-0/+10
* drm/amdgpu: Use instance lookup table for GC 9.4.3Lijo Lazar2023-06-091-0/+3
* drm/amdgpu/: add more macro to support offset variantJames Zhu2023-06-091-25/+11
* drm/amdgpu: make the WREG32_SOC15_xx macro to support multi GCShiwu Zhang2023-06-091-6/+6
* drm/amdgpu: add new write field for soc21Stanley.Yang2022-04-281-0/+8
* drm/amdgpu: switch to amdgpu_sriov_rreg/wregHawking Zhang2022-01-251-4/+4
* drm/amdgpu: Add *_SOC15_IP_NO_KIQ() macro definitionsVictor Skvortsov2021-12-281-0/+5
* drm/amdgpu: Change the imprecise function nameRoy Sun2021-07-231-4/+4
* drm/amdgpu: Fixing "Indirect register access for Navi12 sriov" for vega10Peng Ju Zhou2021-06-071-2/+2
* drm/amdgpu: soc15 register access through RLC should only apply to sriov runtimeshaoyunl2021-06-041-2/+2
* drm/amdgpu: Indirect register access for Navi12 sriovPeng Ju Zhou2021-05-211-36/+51
* drm/amdgpu: indirect register access for nv12 sriovPeng Ju Zhou2021-04-091-42/+33
* drm/amdgpu: enable watchdog feature for SQ of aldebaranDennis Li2021-03-231-0/+30
* drm/amdgpu: add ras support for gfx of aldebaranDennis Li2021-03-231-0/+18
* drm/amdgpu: fix unused variableJames Zhu2020-07-011-6/+9
* drm/amdgpu: provide RREG32_SOC15_NO_KIQ, will be used laterMonk Liu2020-04-241-0/+3
* drm/amdgpu: revise RLCG access pathMonk Liu2020-03-161-3/+2
* drm/amdgpu: Ensure ret is always initialized when using SOC15_WAIT_ON_RREGNathan Chancellor2019-11-261-0/+1
* drm/amdgpu: cleanup vega10 SRIOV code pathMonk Liu2019-08-021-2/+3
* drm/amdgpu: move the VCN DPG mode read and write to VCNLeo Liu2019-05-241-21/+0
* drm/amdgpu: add basic func for RLC program regTrigger Huang2019-05-241-1/+56
* drm/amdgpu:Improves robustness of SOC15_WAIT_ON_RREGJames Zhu2018-12-181-2/+7
* drm/amdgpu/soc15: fix warnings in register macroAlex Deucher2018-09-261-1/+1
* drm/amdgpu:Add DPG mode read/write macroJames Zhu2018-09-261-0/+20
* drm/amdgpu:Add error message when register failed to reach expected valueJames Zhu2018-09-131-0/+2
* drm/amdgpu: Add SOC15_WAIT_ON_RREG macro defineRex Zhu2018-05-241-0/+15
* drm/amdgpu: convert nbio to use callbacks (v2)Alex Deucher2017-12-131-16/+0
* drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offsetShaoyun Liu2017-12-081-5/+1
* drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu2017-12-081-6/+0
* drm/amdgpu: Use dynamic IP offset for register access on SOC15Shaoyun Liu2017-12-081-26/+8
* drm/amdgpu: Add WREG32_SOC15_NO_KIQ macro defineShaoyun Liu2017-07-141-0/+7
* drm/amd/amdgpu: Add offset variant to SOC15 macrosTom St Denis2017-06-151-0/+14
* drm/amd/amdgpu: Introduce new read/write macros for SOC15Tom St Denis2017-04-281-1/+19
* drm/amdgpu: add common soc15 headersKen Wang2017-03-291-0/+57
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