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path: root/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
Commit message (Expand)AuthorAgeFilesLines
* drm/amd/display: refactor dump_clk_registersSu Sung Chung2019-07-181-1/+1
* drm/amd/display: make clk mgr soc specificEric Yang2019-05-311-1/+1
* drm/amd/display: Fix multi-thread writing to 1 stateAidan Wood2019-04-031-6/+6
* drm/amd/display: fix up reference clock abstractionsJun Lei2019-03-191-2/+2
* drm/amd/display: fix compliler errors [-Werror,-Wmissing-braces]Shirish S2019-01-141-1/+2
* drm/amd/display/dcn10_hw_sequencer_debug: Remove duplicate headerBrajeswar Ghosh2019-01-141-1/+0
* drm/amd/display: Use 100 Hz precision for pipe pixel clocksKen Chalmers2019-01-141-1/+1
* drm/amd/display: Add pixel clock values to dtn logsFatemeh Darbehani2019-01-141-3/+6
* drm/amd/display: Fix runtime errors for diagnostic testsEric Bernstein2019-01-141-1/+1
* drm/amd/display: Clean up for DCN1 clock debug loggingFatemeh Darbehani2018-11-301-16/+23
* drm/amd/display: make underflow status clear explicitJun Lei2018-11-191-6/+53
* drm/amd/display: Add invariant support instrumentation in driverJun Lei2018-09-101-27/+57
* drm/amd/display: Add driver-side parsing for CMJun Lei2018-09-101-4/+25
* drm/amd/display: implement DPMS DTN test v2Jun Lei2018-08-271-0/+510
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