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path: root/drivers/gpu/drm/amd/display/dc/dml/dcn321
Commit message (Expand)AuthorAgeFilesLines
* drm/amd/display: Introduce DML2Qingqing Zhuo2023-10-091-0/+81
* drm/amd/display: Disable DC Mode Capping On DCN321Austin Zheng2023-06-231-5/+5
* drm/amd/display: Add Clock Table Entry With Max DC ValuesAustin Zheng2023-06-232-10/+86
* drm/amd/display: Filter out AC mode frequencies on DC mode systemsAustin Zheng2023-06-091-42/+102
* drm/amd/display: clean up some inconsistent indentingJiapeng Chong2023-06-091-121/+121
* drm/amd/display: Clean FPGA code in dcQingqing Zhuo2023-06-091-62/+58
* drm/amd/display: Update bounding box values for DCN321Aurabindo Pillai2023-04-211-12/+12
* drm/amd/display: Update to correct min FCLK when construction BBAlvin Lee2023-03-071-2/+3
* drm/amd/display: adjust MALL size available for DCN32 and DCN321Samson Tam2023-01-241-1/+4
* drm/amd/display: Reduce expected sdp bandwidth for dcn321Dillon Varone2022-12-151-1/+1
* drm/amd/display: Update soc bounding box for dcn32/dcn321Dillon Varone2022-11-231-4/+4
* drm/amd/display: Enforce minimum prefetch time for low memclk on DCN32Dillon Varone2022-11-091-0/+2
* drm/amd/display: Add DSC delay factor workaroundGeorge Shen2022-11-011-1/+4
* drm/amd/display: Update latencies on DCN321Dillon Varone2022-10-271-5/+5
* drm/amd/display: Fix urgent latency override for DCN32/DCN321George Shen2022-09-191-0/+1
* drm/amd/display: clean up some inconsistent indentingsYang Li2022-08-291-5/+8
* drm/amd/display: Add a variable to update FCLK latencyAlvin Lee2022-08-101-0/+7
* drm/amd/display: Update DCN32 and DCN321 SR latenciesAlvin Lee2022-07-251-2/+2
* drm/amd/display: Drop FPU code from dcn321 resourceRodrigo Siqueira2022-07-252-0/+448
* drm/amd/display: Create dcn321_fpu fileRodrigo Siqueira2022-07-252-0/+274
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