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path: root/drivers/gpu/drm/amd/include
Commit message (Expand)AuthorAgeFilesLines
* drm/amdgpu: Add early fini callbackAndrey Grodzovsky2021-05-191-0/+2
* gpu: drm: replace occurrences of invalid characterMauro Carvalho Chehab2021-05-191-5/+5
* drm/amdgpu: only harvest gcea/mmea error status in arcturusHawking Zhang2021-04-201-0/+16
* drm/amd: update the atomfirmware header for smu12Xiaojian Du2021-04-151-0/+41
* drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flagJude Shih2021-04-091-0/+2
* drm/amd/display: Interface for LTTPR interopWesley Chalmers2021-04-091-0/+1
* drm/amd/display: BIOS LTTPR Caps InterfaceWesley Chalmers2021-04-091-1/+36
* drm/amd/amdgpu: Add CP_IB1_BASE_* to gc_10_3_0 headersTom St Denis2021-04-092-0/+15
* drm/amd: Fix a typo in two different sentencesBhaskar Chowdhury2021-04-091-2/+2
* drm/amd/pm: make DAL communicate with SMU through unified interfacesEvan Quan2021-04-091-0/+14
* drm/amd/pm: add a new sysfs entry for default power limitEric Huang2021-03-231-1/+2
* drm/amdgpu: update umc_info v3_3 structure for ECCHawking Zhang2021-03-231-1/+12
* drm/amd/pm: add new data in metrics tableKenneth Feng2021-03-231-0/+7
* drm/amdkfd: Check HIQ's MQD for queue preemption statusOak Zeng2021-03-231-16/+16
* drm/amd/pm: Enable performance determinism on aldebaranLijo Lazar2021-03-231-0/+1
* drm/amdpgu: add ATOM_DGPU_VRAM_TYPE_HBM2E vram typeFeifei Xu2021-03-231-0/+1
* drm/amdgpu: query aldebaran gfx_config through atomfirmware i/fHawking Zhang2021-03-231-0/+41
* drm/amd/pm: Add atom_smc_dpm_info_v4_10 for aldebaranLijo Lazar2021-03-231-0/+53
* drm/amdgpu: update atom_firmware_info_v3_4 (v2)Feifei Xu2021-03-231-1/+4
* drm/amdgpu: support get_vram_info atomfirmware i/f for aldebaranHawking Zhang2021-03-231-0/+16
* drm/amdgpu: Fix IH client ID naming tableOak Zeng2021-03-231-0/+1
* drm/amdgpu: Print the IH client ID name when vm fault happensYong Zhao2021-03-231-2/+6
* drm/amd/include: add ip offset header for aldebaran (v5)Hawking Zhang2021-03-101-0/+1738
* drm/amdgpu: add vcn v2_6_0 ip headers (v3)Hawking Zhang2021-03-102-0/+5997
* drm/amdgpu: add umc v6_7_0 ip headers (v3)Hawking Zhang2021-03-102-0/+13416
* drm/amdgpu: add thm v13_0_2 ip headers (v3)Hawking Zhang2021-03-102-0/+1643
* drm/amdgpu: add sdma v4_4_0 ip headers (v2)Hawking Zhang2021-03-102-0/+19146
* drm/amdgpu: add smuio v13_0_2 ip headers (v3)Hawking Zhang2021-03-102-0/+1679
* drm/amdgpu: add mp v13_0_2 ip headers (v3)Hawking Zhang2021-03-102-0/+892
* drm/amdgpu: add mmhub v1_7 ip headers (v3)Hawking Zhang2021-03-102-0/+37303
* drm/amdgpu: add gc v9_4_2 ip headers (v3)Hawking Zhang2021-03-102-0/+40632
* drm/amd/amdgpu: Add missing BASE_IDX to dcn registerTom St Denis2021-03-051-1/+1
* drm/amdgpu: add DMUB trace event IRQ source defineLeo (Hanghong) Ma2021-03-051-0/+2
* drm/amd/pm: correct gpu metrics related data structures V3Evan Quan2021-03-051-0/+112
* amdgpu/pm: Powerplay API for smu , changes to clock and profile mode functionsDarren Powell2021-02-261-0/+4
* drm/amdgpu: add SMUIO 11.0.6 register headersLikun Gao2021-02-092-0/+76
* drm/amd/pm: enable DCSKenneth Feng2021-02-091-0/+1
* drm/amdgpu:Add pcie gen5 support in pcie capability.Feifei Xu2021-01-211-0/+2
* drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unusedLee Jones2021-01-141-1/+1
* drm/amd/pm: implement processor fine grain feature for vangogh (v3)Huang Rui2021-01-131-0/+1
* drm/amd/pm: implement the processor clocks which read by metricHuang Rui2021-01-131-0/+1
* drm/amd/pm: support overdrive vddgfx offset setting(V2)Evan Quan2020-12-231-1/+2
* drm/amdgpu: add osssys v4_2 ip headers (v2)Hawking Zhang2020-12-232-0/+1645
* drm/amdgpu: new macro for determining 2ND_USB20PORT supportEvan Quan2020-12-101-0/+1
* drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe...Lee Jones2020-11-241-1/+1
* drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unusedLee Jones2020-11-241-1/+1
* drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_u...Lee Jones2020-11-241-1/+1
* drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unusedLee Jones2020-11-241-1/+1
* drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unusedLee Jones2020-11-241-1/+1
* drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_...Lee Jones2020-11-241-2/+2
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