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path: root/drivers/gpu/drm/i915/i915_reg.h
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* drm/i915: fix gen4 digital port hotplug definitionsDaniel Vetter2013-08-071-3/+9
* drm/i915: Fix context sizes on HSWBen Widawsky2013-07-011-8/+7
* drm/i915: Fix VLV sprite register offsetsVille Syrjälä2013-07-011-25/+25
* drm/i915: s/LFP/LPF in DPIO PLL register namesVille Syrjälä2013-07-011-3/+3
* drm/i915: Fix up sdvo hpd pins for i965g/gmDaniel Vetter2013-07-011-7/+6
* drm/i915: explicitly set up PIPECONF (and gamma table) on haswellDaniel Vetter2013-06-181-3/+3
* drm/i915: Try harder to disable trickle feed on VLVVille Syrjälä2013-06-131-0/+2
* drm/i915: scrap register address storageDaniel Vetter2013-06-101-3/+3
* drm/i915: refactor PCH_DPLL_SEL #definesDaniel Vetter2013-06-101-9/+3
* drm/i915: WA: FBC Render Nuke.Rodrigo Vivi2013-06-071-0/+4
* Revert "drm/i915: Include display_mmio_offset in sequencer index/data registers"Ville Syrjälä2013-06-061-8/+2
* drm/i915: Fix DSPCLK_GATE_D for VLVVille Syrjälä2013-06-051-1/+1
* drm/i915: implement IPS featurePaulo Zanoni2013-05-311-0/+11
* drm/i915: Enable vebox interruptsBen Widawsky2013-05-311-0/+3
* drm/i915: consolidate interrupt naming schemeBen Widawsky2013-05-311-58/+43
* drm/i915: make PM interrupt writes non-destructiveBen Widawsky2013-05-311-1/+1
* drm/i915: properly set HSW WM_LP watermarksPaulo Zanoni2013-05-311-0/+4
* drm/i915: properly set HSW WM_PIPE registersPaulo Zanoni2013-05-311-0/+3
* drm/i915: Vebox ringbuffer initBen Widawsky2013-05-311-0/+1
* drm/i915: Add VECS semaphore bitsBen Widawsky2013-05-311-13/+27
* drm/i915: Semaphore MBOX update generalizationBen Widawsky2013-05-311-0/+1
* drm/i915: Comments for semaphore clarificationBen Widawsky2013-05-311-6/+6
* drm/i915: refactor VLV IOSF sideband accessors to use one helperJani Nikula2013-05-231-50/+43
* drm/i915: set FORCE_ARB_IDLE_PLANES workaroundPaulo Zanoni2013-05-231-0/+3
* Merge tag 'v3.10-rc2' into drm-intel-next-queuedDaniel Vetter2013-05-211-7/+4
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| * Revert "drm/i915: Calculate correct stolen size for GEN7+"Ben Widawsky2013-05-071-2/+0
| * drm/i915: Make data/link N value power of twoVille Syrjälä2013-04-231-8/+4
* | drm/i915: HSW FBC WaFbcDisableDpfcClockGatingRodrigo Vivi2013-05-101-0/+3
* | drm/i915: HSW FBC WaFbcAsynchFlipDisableFbcQueueRodrigo Vivi2013-05-101-0/+7
* | drm/i915: Add support for FBC on Ivybridge.Rodrigo Vivi2013-05-101-0/+6
* | drm/i915: BIOS and power context stolen mem handling for VLV v7Jesse Barnes2013-05-101-0/+1
* | drm/i915: Apply OCD to data/link m/n register #definesDaniel Vetter2013-05-061-37/+37
* | drm/i915: PCH_ prefix for transcoder timingsDaniel Vetter2013-05-061-35/+35
* | drm/i915: s/TRANSCONF/PCH_TRANSCONF/Daniel Vetter2013-05-061-3/+4
* | drm/i915: simplify DP/DDI port width macrosDaniel Vetter2013-05-021-9/+2
* | drm/i915: hw state readout support for pipe timingsDaniel Vetter2013-04-291-0/+1
* | drm/i915: hw state readout support for fdi m/nDaniel Vetter2013-04-291-0/+1
* | drm/i915: hw state readout support for pipe_config->fdi_lanesDaniel Vetter2013-04-291-8/+3
* | drm/i915: hsw backlight registers need transcoder instead of pipeJani Nikula2013-04-251-0/+4
* | drm/i915: Move the CSC_MODE bits next to the registerVille Syrjälä2013-04-191-4/+3
* | drm/i915: print Gen5+ CPU/PCH poison interruptsPaulo Zanoni2013-04-191-0/+2
* | drm/i915: report Gen5+ CPU and PCH FIFO underrunsPaulo Zanoni2013-04-191-2/+11
* | drm/i915: magic VLV PLL registers in the dpio sidebandDaniel Vetter2013-04-181-2/+116
* | drm/i915: turbo & RC6 support for VLV v7Jesse Barnes2013-04-181-0/+21
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* drm/i915: preserve the PBC bits of TRANS_CHICKEN2Paulo Zanoni2013-04-181-2/+5
* drm/i915: set CPT FDI RX polarity bits based on VBTPaulo Zanoni2013-04-181-1/+1
* drm/i915: Scale ring, rather than ia, frequency on HaswellChris Wilson2013-04-181-0/+4
* drm/i915: Increase max fence pitch limit to 256KB on IVB+Ville Syrjälä2013-04-181-0/+1
* drm/i915: Configure GAM_ECOCHK appropriatly for Gen7Ville Syrjälä2013-04-181-0/+5
* drm/i915: Add ECOBITS_SNB_BITVille Syrjälä2013-04-181-0/+1
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