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path: root/drivers/gpu/drm/i915/i915_reg.h
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* drm/i915: add vlv_pipe_to_phy() helper to replace DPIO_PHY()Jani Nikula2023-11-171-2/+0
* drm/i915/xe2lpd: display capability register definitionsVinod Govindapillai2023-10-111-0/+7
* drm/i915/lnl: possibility to enable FBC on first three planesVinod Govindapillai2023-10-031-0/+2
* drm/i915/lnl: Start using CDCLK through PLLStanislav Lisovskiy2023-09-211-0/+1
* drm/i915/xe2lpd: Read pin assignment from IOMLuca Coelho2023-09-211-0/+1
* drm/i915/xe2lpd: Handle port AUX interruptsGustavo Sousa2023-09-211-3/+2
* drm/i915/regs: split out intel_color_regs.hJani Nikula2023-08-251-274/+0
* Merge tag 'drm-intel-gt-next-2023-08-04' of git://anongit.freedesktop.org/drm...Dave Airlie2023-08-071-2/+24
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| * drm/i915/mtl/gsc: Add a gsc_info debugfsDaniele Ceraolo Spurio2023-06-131-2/+24
* | drm/i915/hotplug: Reduce SHPD_FILTER to 250usSuraj Kandpal2023-07-261-0/+1
* | Merge drm/drm-next into drm-intel-nextJani Nikula2023-06-101-0/+3
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| * | Merge tag 'drm-intel-gt-next-2023-06-08' of git://anongit.freedesktop.org/drm...Dave Airlie2023-06-091-0/+3
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| | * drm/i915/huc: differentiate the 2 steps of the MTL HuC auth flowDaniele Ceraolo Spurio2023-06-051-0/+3
* | | drm/i915/mtl: Add support for PM DEMANDMika Kahola2023-06-071-2/+24
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* | drm/i915: Implement CTM property support for VLVVille Syrjälä2023-05-261-0/+15
* | drm/i915/display: Make display responsible for probing its own IPMatt Roper2023-05-241-33/+0
* | Merge drm/drm-next into drm-intel-nextRodrigo Vivi2023-05-171-2/+12
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| * drm/i915/color: Fix typo for Plane CSC indexesChaitanya Kumar Borah2023-04-141-2/+2
| * Merge tag 'drm-intel-next-2023-04-06' of git://anongit.freedesktop.org/drm/dr...Daniel Vetter2023-04-061-1221/+22
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| * \ Merge tag 'drm-intel-gt-next-2023-04-06' of git://anongit.freedesktop.org/drm...Daniel Vetter2023-04-061-2/+12
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| | * | drm/i915/gsc: implement wa 14015076503Daniele Ceraolo Spurio2023-03-281-2/+12
* | | | drm/i915: Define more PS_CTRL bitsVille Syrjälä2023-05-111-0/+11
* | | | drm/i915: Communicate display power demands to pcodeStanislav Lisovskiy2023-05-051-0/+14
* | | | drm/i915: Use REG_BIT() & co. for pipe scaler registersVille Syrjälä2023-05-041-45/+53
* | | | drm/i915: Define bitmasks for skl+ scaler window pos/sizeVille Syrjälä2023-05-041-0/+8
* | | | drm/i915: s/PS_COEE_INDEX_AUTO_INC/PS_COEF_INDEX_AUTO_INC/Ville Syrjälä2023-05-041-1/+1
* | | | drm/i915: Rename skl+ scaler binding bitsVille Syrjälä2023-05-041-4/+5
* | | | drm/i915: Remove dead scaler register definesVille Syrjälä2023-05-041-12/+0
* | | | drm/i915: Define bitmasks for ilk pfit window pos/sizeVille Syrjälä2023-05-041-0/+8
* | | | drm/i915/psr: Define more PSR mask bitsVille Syrjälä2023-04-201-2/+10
* | | | drm/i915: Clean up various display chicken registersVille Syrjälä2023-04-201-55/+59
* | | | drm/i915: Fix up whitespace in some display chicken registersVille Syrjälä2023-04-201-36/+36
* | | | drm/i915: Use REG_BIT() & co. for ilk+ pfit registersVille Syrjälä2023-04-201-10/+10
* | | | drm/i915: Namespace pfit registers properlyVille Syrjälä2023-04-201-7/+7
* | | | drm/i915: Use REG_BIT() & co for the pre-ilk pfit registersVille Syrjälä2023-04-201-28/+26
* | | | drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CT...Ankit Nautiyal2023-04-141-0/+2
* | | | drm/i915/mtl/display: Implement DisplayPort sequencesJosé Roberto de Souza2023-04-141-0/+5
* | | | drm/i915/mtl: MTL PICA hotplug detectionMika Kahola2023-04-141-1/+30
* | | | drm/i915/mtl: Add Support for C10 PHY message bus and pll programmingRadhakrishna Sripada2023-04-141-0/+5
* | | | drm/i915/color: Fix typo for Plane CSC indexesChaitanya Kumar Borah2023-04-131-2/+2
* | | | drm/i915/vrr: Make delayed vblank operational in VRR mode on adl/dg2Ville Syrjälä2023-04-121-2/+1
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* | | drm/i915/psr: split out PSR regs to a separate fileJani Nikula2023-04-041-249/+0
* | | drm/i915/wm: split out SKL+ watermark regs to a separate fileJani Nikula2023-04-041-149/+0
* | | drm/i915: Define cursor chicken regVille Syrjälä2023-03-311-0/+2
* | | drm/i915: Document that PLANE_CHICKEN are for tgl+Ville Syrjälä2023-03-311-2/+2
* | | drm/i915/dsb: split out DSB regs to a separate fileJani Nikula2023-03-301-56/+0
* | | drm/i915/fdi: split out FDI regs to a separate fileJani Nikula2023-03-301-141/+0
* | | drm/i915/aux: split out DP AUX regs to a separate fileJani Nikula2023-03-301-73/+0
* | | drm/i915/tv: split out TV regs to a separate fileJani Nikula2023-03-301-479/+0
* | | drm/i915/pps: split out PPS regs to a separate fileJani Nikula2023-03-301-67/+0
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