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path: root/drivers/gpu/drm/i915
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* drm/i915: disable sampler indirect state in bindless heapLionel Landwerlin2023-04-122-0/+20
* Merge tag 'drm-intel-next-2023-04-06' of git://anongit.freedesktop.org/drm/dr...Daniel Vetter2023-04-0674-2887/+3949
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| * drm/i915/wakeref: fix kernel-doc commentJani Nikula2023-04-061-1/+1
| * drm/i915/tc: demote a kernel-doc comment to a regular commentJani Nikula2023-04-061-4/+1
| * drm/i915/clock: mass rename dev_priv to i915Jani Nikula2023-04-051-293/+296
| * drm/i915: rename intel_pm.[ch] to intel_clock_gating.[ch]Jani Nikula2023-04-058-35/+31
| * drm/i915/pxp: limit drm-errors or warning on firmware API failuresAlan Previn2023-04-053-15/+67
| * drm/i915: run kernel-doc on headers as part of HDRTESTJani Nikula2023-04-051-1/+2
| * drm/i915: Implement UHBR bandwidth checkStanislav Lisovskiy2023-04-051-4/+29
| * drm/i915: enable kernel-doc warnings for CONFIG_DRM_I915_WERROR=yJani Nikula2023-04-041-0/+7
| * drm/i915/psr: split out PSR regs to a separate fileJani Nikula2023-04-047-249/+265
| * drm/i915/wm: split out SKL+ watermark regs to a separate fileJani Nikula2023-04-046-149/+164
| * drm/i915: Explain the magic numbers for AUX SYNC/precharge lengthVille Syrjälä2023-04-041-3/+29
| * drm/i915: Fix fast wake AUX sync lenVille Syrjälä2023-04-041-1/+1
| * drm/i915/hwmon: Use 0 to designate disabled PL1 power limitAshutosh Dixit2023-04-031-0/+26
| * drm/i915/display/intel_wm: Fix a little doc-rot in intel_update_watermarks()Lee Jones2023-04-031-1/+1
| * drm/i915/display/intel_display_power: Fix incorrectly documented function __i...Lee Jones2023-04-031-1/+1
| * drm/i915/display/intel_display_debugfs: Fix incorrect param naming for 'intel...Lee Jones2023-04-031-1/+1
| * drm/i915: Remove the encoder update_prepare()/complete() hooksImre Deak2023-04-033-121/+12
| * drm/i915: Remove TC PHY disconnect workaroundImre Deak2023-04-031-8/+0
| * drm/i915: Disable DPLLs before disconnecting the TC PHYImre Deak2023-04-033-3/+29
| * drm/i915: Move shared DPLL disabling into CRTC disable hookImre Deak2023-04-032-2/+4
| * drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspecImre Deak2023-04-031-17/+94
| * drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()Imre Deak2023-04-031-3/+8
| * drm/i915/tc: Get power ref for reading the HPD live status registerImre Deak2023-04-031-8/+19
| * drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detectionImre Deak2023-04-031-12/+9
| * drm/i915/tc: Add TC PHY hook to init the PHYImre Deak2023-04-033-44/+56
| * drm/i915/tc: Add asserts in TC PHY hooks that the required power is onImre Deak2023-04-031-0/+61
| * drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domainImre Deak2023-04-031-14/+59
| * drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameterImre Deak2023-04-031-24/+37
| * drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()Imre Deak2023-04-031-8/+0
| * drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooksImre Deak2023-04-031-30/+13
| * drm/i915/tc: Check TC mode instead of the VBT legacy flagImre Deak2023-04-031-8/+7
| * drm/i915/tc: Fix up the legacy VBT flag only in disconnected modeImre Deak2023-04-031-3/+10
| * drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHYImre Deak2023-04-031-3/+9
| * drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()Imre Deak2023-04-031-18/+29
| * drm/i915/tc: Add generic TC PHY connect/disconnect handlersImre Deak2023-04-031-26/+39
| * drm/i915/tc: Add TC PHY hook to read out the PHY HW stateImre Deak2023-04-031-10/+24
| * drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned stateImre Deak2023-04-031-12/+8
| * drm/i915/tc: Add TC PHY hook to get the PHY HPD live statusImre Deak2023-04-031-11/+29
| * drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.cImre Deak2023-04-034-37/+49
| * drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()Imre Deak2023-04-031-1/+2
| * drm/i915/tc: Move TC port fields to a new intel_tc_port structImre Deak2023-04-034-289/+335
| * drm/i915/tc: Use the tc_phy prefix for all TC PHY functionsImre Deak2023-04-031-15/+15
| * drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()Imre Deak2023-04-031-12/+12
| * drm/i915/tc: Use the adlp prefix for ADLP TC PHY functionsImre Deak2023-04-031-9/+9
| * drm/i915/tc: Group the TC PHY setup/query functions per platformImre Deak2023-04-031-114/+130
| * drm/i915/dsc: Add debugfs entry to validate DSC output formatsSwati Sharma2023-04-035-2/+87
| * drm/i915/vdsc: Check slice design requirementSuraj Kandpal2023-04-031-0/+32
| * drm/i915/dsc: Fill in native_420 fieldSuraj Kandpal2023-04-033-16/+100
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