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* Merge tag 'drm-msm-fixes-2025-04-18' of ↵Dave Airlie6 days10-55/+53
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.freedesktop.org/drm/msm into drm-fixes Fixes for v6.15-rc3 Display: - Fix to call dpu_plane_atomic_check_pipe() for both SSPPs in case of multi-rect - Fix to validate plane_state pointer before using it in dpu_plane_virtual_atomic_check() - Fix to make sure dereferencing dpu_encoder_phys happens after making sure it is valid in _dpu_encoder_trigger_start() - Remove the remaining intr_tear_rd_ptr which we initialized to -1 because NO_IRQ indices start from 0 now GPU: - Fix IB_SIZE overflow Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://lore.kernel.org/r/CAF6AEGtVKXEVdzUzFWmQE8JmK3nx_hp+ynOd-5j3vnfcU-sgOA@mail.gmail.com
| * drm/msm/a6xx+: Don't let IB_SIZE overflowRob Clark6 days2-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IB_SIZE is only b0..b19. Starting with a6xx gen3, additional fields were added above the IB_SIZE. Accidentially setting them can cause badness. Fix this by properly defining the CP_INDIRECT_BUFFER packet and using the generated builder macro to ensure unintended bits are not set. v2: add missing type attribute for IB_BASE v3: fix offset attribute in xml Reported-by: Connor Abbott <cwabbott0@gmail.com> Fixes: a83366ef19ea ("drm/msm/a6xx: add A640/A650 to gpulist") Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/643396/
| * drm/msm/dpu: drop rogue intr_tear_rd_ptr valuesDmitry Baryshkov2025-04-106-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 5a9d50150c2c ("drm/msm/dpu: shift IRQ indices by 1") shifted IRQ indices by 1, making 'NO_IRQ' to be 0 rather than -1 (and allowing to skip the definition if the IRQ is not present). Several platform files were sketched before that commit, but got applied afterwards. As such, they inherited historical (and currently incorrect) setting of .intr_tear_rd_ptr = -1 for 'NO_IRQ' value. Drop that setting for all the affected platforms. Fixes: 62af6e1cb596 ("drm/msm/dpu: Add support for MSM8917") Fixes: c079680bb0fa ("drm/msm/dpu: Add support for MSM8937") Fixes: 7a6109ce1c2c ("drm/msm/dpu: Add support for MSM8953") Fixes: daf9a92daeb8 ("drm/msm/dpu: Add support for MSM8996") Fixes: 7204df5e7e68 ("drm/msm/dpu: add support for SDM660 and SDM630 platforms") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/647486/ Link: https://lore.kernel.org/r/20250408-dpu-drop-intr-rd-ptr-v1-1-eeac337d88f8@oss.qualcomm.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
| * drm/msm/dpu: reorder pointer operations after sanity checks to avoid NULL derefQasim Ijaz2025-04-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _dpu_encoder_trigger_start dereferences "struct dpu_encoder_phys *phys" before the sanity checks which can lead to a NULL pointer dereference if phys is NULL. Fix this by reordering the dereference after the sanity checks. Fixes: 8144d17a81d9 ("drm/msm/dpu: Skip trigger flush and start for CWB") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Qasim Ijaz <qasdev00@gmail.com> Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/647536/ Link: https://lore.kernel.org/r/20250408172223.10827-1-qasdev00@gmail.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
| * drm/msm/dpu: Fix error pointers in dpu_plane_virtual_atomic_checkChenyuan Yang2025-04-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function dpu_plane_virtual_atomic_check was dereferencing pointers returned by drm_atomic_get_plane_state without checking for errors. This could lead to undefined behavior if the function returns an error pointer. This commit adds checks using IS_ERR to ensure that plane_state is valid before dereferencing them. Similar to commit da29abe71e16 ("drm/amd/display: Fix error pointers in amdgpu_dm_crtc_mem_type_changed"). Fixes: 774bcfb73176 ("drm/msm/dpu: add support for virtual planes") Signed-off-by: Chenyuan Yang <chenyuan0y@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/643132/ Link: https://lore.kernel.org/r/20250314011004.663804-1-chenyuan0y@gmail.com Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
| * drm/msm/dpu: check every pipe per capabilityJun Nie2025-04-101-35/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The capability stored in sblk and pipe_hw_caps is checked only for SSPP of the first pipe in the pair with current implementation. That of the 2nd pipe, r_pipe, is not checked and may violate hardware capability. Move requirement check to dpu_plane_atomic_check_pipe() for the check of every pipe. Fixes: ("dbbf57dfd04e6 drm/msm/dpu: split dpu_plane_atomic_check()") Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/640513/ Link: https://lore.kernel.org/r/20250303-sm8650-v6-14-hmd-deckard-mdss-quad-upstream-oldbootwrapper-36-prep-v8-1-eb5df105c807@linaro.org Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
* | treewide: Switch/rename to timer_delete[_sync]()Thomas Gleixner2025-04-057-9/+9
| | | | | | | | | | | | | | | | | | | | timer_delete[_sync]() replaces del_timer[_sync](). Convert the whole tree over and remove the historical wrapper inlines. Conversion was done with coccinelle plus manual fixups where necessary. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | Merge tag 'drm-next-2025-03-28' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds2025-03-2883-967/+1728
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "Outside of drm there are some rust patches from Danilo who maintains that area in here, and some pieces for drm header check tests. The major things in here are a new driver supporting the touchbar displays on M1/M2, the nova-core stub driver which is just the vehicle for adding rust abstractions and start developing a real driver inside of. xe adds support for SVM with a non-driver specific SVM core abstraction that will hopefully be useful for other drivers, along with support for shrinking for TTM devices. I'm sure xe and AMD support new devices, but the pipeline depth on these things is hard to know what they end up being in the marketplace! uapi: - add mediatek tiled fourcc - add support for notifying userspace on device wedged new driver: - appletbdrm: support for Apple Touchbar displays on m1/m2 - nova-core: skeleton rust driver to develop nova inside off firmware: - add some rust firmware pieces rust: - add 'LocalModule' type alias component: - add helper to query bound status fbdev: - fbtft: remove access to page->index media: - cec: tda998x: import driver from drm dma-buf: - add fast path for single fence merging tests: - fix lockdep warnings atomic: - allow full modeset on connector changes - clarify semantics of allow_modeset and drm_atomic_helper_check - async-flip: support on arbitary planes - writeback: fix UAF - Document atomic-state history format-helper: - support ARGB8888 to ARGB4444 conversions buddy: - fix multi-root cleanup ci: - update IGT dp: - support extended wake timeout - mst: fix RAD to string conversion - increase DPCD eDP control CAP size to 5 bytes - add DPCD eDP v1.5 definition - add helpers for LTTPR transparent mode panic: - encode QR code according to Fido 2.2 scheduler: - add parameter struct for init - improve job peek/pop operations - optimise drm_sched_job struct layout ttm: - refactor pool allocation - add helpers for TTM shrinker panel-orientation: - add a bunch of new quirks panel: - convert panels to multi-style functions - edp: Add support for B140UAN04.4, BOE NV140FHM-NZ, CSW MNB601LS1-3, LG LP079QX1-SP0V, MNE007QS3-7, STA 116QHD024002, Starry 116KHD024006, Lenovo T14s Gen6 Snapdragon - himax-hx83102: Add support for CSOT PNA957QT1-1, Kingdisplay kd110n11-51ie, Starry 2082109qfh040022-50e - visionox-r66451: use multi-style MIPI-DSI functions - raydium-rm67200: Add driver for Raydium RM67200 - simple: Add support for BOE AV123Z7M-N17, BOE AV123Z7M-N17 - sony-td4353-jdi: Use MIPI-DSI multi-func interface - summit: Add driver for Apple Summit display panel - visionox-rm692e5: Add driver for Visionox RM692E5 bridge: - pass full atomic state to various callbacks - adv7511: Report correct capabilities - it6505: Fix HDCP V compare - snd65dsi86: fix device IDs - nwl-dsi: set bridge type - ti-sn65si83: add error recovery and set bridge type - synopsys: add HDMI audio support xe: - support device-wedged event - add mmap support for PCI memory barrier - perf pmu integration and expose per-engien activity - add EU stall sampling support - GPU SVM and Xe SVM implementation - use TTM shrinker - add survivability mode to allow the driver to do firmware updates in critical failure states - PXP HWDRM support for MTL and LNL - expose package/vram temps over hwmon - enable DP tunneling - drop mmio_ext abstraction - Reject BO evcition if BO is bound to current VM - Xe suballocator improvements - re-use display vmas when possible - add GuC Buffer Cache abstraction - PCI ID update for Panther Lake and Battlemage - Enable SRIOV for Panther Lake - Refactor VRAM manager location i915: - enable extends wake timeout - support device-wedged event - Enable DP 128b/132b SST DSC - FBC dirty rectangle support for display version 30+ - convert i915/xe to drm client setup - Compute HDMI PLLS for rates not in fixed tables - Allow DSB usage when PSR is enabled on LNL+ - Enable panel replay without full modeset - Enable async flips with compressed buffers on ICL+ - support luminance based brightness via DPCD for eDP - enable VRR enable/disable without full modeset - allow GuC SLPC default strategies on MTL+ for performance - lots of display refactoring in move to struct intel_display amdgpu: - add device wedged event - support async page flips on overlay planes - enable broadcast RGB drm property - add info ioctl for virt mode - OEM i2c support for RGB lights - GC 11.5.2 + 11.5.3 support - SDMA 6.1.3 support - NBIO 7.9.1 + 7.11.2 support - MMHUB 1.8.1 + 3.3.2 support - DCN 3.6.0 support - Add dynamic workload profile switching for GC 10-12 - support larger VBIOS sizes - Mark gttsize parameters as deprecated - Initial JPEG queue resset support amdkfd: - add KFD per process flags for setting precision - sync pasid values between KGD and KFD - improve GTT/VRAM handling for APUs - fix user queue validation on GC7/8 - SDMA queue reset support raedeon: - rs400 hyperz fix i2c: - td998x: drop platform_data, split driver into media and bridge ast: - transmitter chip detection refactoring - vbios display mode refactoring - astdp: fix connection status and filter unsupported modes - cursor handling refactoring imagination: - check job dependencies with sched helper ivpu: - improve command queue handling - use workqueue for IRQ handling - add support HW fault injection - locking fixes mgag200: - add support for G200eH5 msm: - dpu: add concurrent writeback support for DPU 10.x+ - use LTTPR helpers - GPU: - Fix obscure GMU suspend failure - Expose syncobj timeline support - Extend GPU devcoredump with pagetable info - a623 support - Fix a6xx gen1/gen2 indexed-register blocks in gpu snapshot / devcoredump - Display: - Add cpu-cfg interconnect paths on SM8560 and SM8650 - Introduce KMS OMMU fault handler, causing devcoredump snapshot - Fixed error pointer dereference in msm_kms_init_aspace() - DPU: - Fix mode_changing handling - Add writeback support on SM6150 (QCS615) - Fix DSC programming in 1:1:1 topology - Reworked hardware resource allocation, moving it to the CRTC code - Enabled support for Concurrent WriteBack (CWB) on SM8650 - Enabled CDM blocks on all relevant platforms - Reworked debugfs interface for BW/clocks debugging - Clear perf params before calculating bw - Support YUV formats on writeback - Fixed double inclusion - Fixed writeback in YUV formats when using cloned output, Dropped wb2_formats_rgb - Corrected dpu_crtc_check_mode_changed and struct dpu_encoder_virt kerneldocs - Fixed uninitialized variable in dpu_crtc_kickoff_clone_mode() - DSI: - DSC-related fixes - Rework clock programming - DSI PHY: - Fix 7nm (and lower) PHY programming - Add proper DT schema definitions for DSI PHY clocks - HDMI: - Rework the driver, enabling the use of the HDMI Connector framework - Bindings: - Added eDP PHY on SA8775P nouveau: - move drm_slave_encoder interface into driver - nvkm: refactor GSP RPC - use LTTPR helpers mediatek: - HDMI fixup and refinement - add MT8188 dsc compatible - MT8365 SoC support panthor: - Expose sizes of intenral BOs via fdinfo - Fix race between reset and suspend - Improve locking qaic: - Add support for AIC200 renesas: - Fix limits in DT bindings rockchip: - support rk3562-mali - rk3576: Add HDMI support - vop2: Add new display modes on RK3588 HDMI0 up to 4K - Don't change HDMI reference clock rate - Fix DT bindings - analogix_dp: add eDP support - fix shutodnw solomon: - Set SPI device table to silence warnings - Fix pixel and scanline encoding v3d: - handle clock vc4: - Use drm_exec - Use dma-resv for wait-BO ioctl - Remove seqno infrastructure virtgpu: - Support partial mappings of GEM objects - Reserve VGA resources during initialization - Fix UAF in virtgpu_dma_buf_free_obj() - Add panic support vkms: - Switch to a managed modesetting pipeline - Add support for ARGB8888 - fix UAf xlnx: - Set correct DMA segment size - use mutex guards - Fix error handling - Fix docs" * tag 'drm-next-2025-03-28' of https://gitlab.freedesktop.org/drm/kernel: (1762 commits) drm/amd/pm: Update feature list for smu_v13_0_6 drm/amdgpu: Add parameter documentation for amdgpu_sync_fence drm/amdgpu/discovery: optionally use fw based ip discovery drm/amdgpu/discovery: use specific ip_discovery.bin for legacy asics drm/amdgpu/discovery: check ip_discovery fw file available drm/amd/pm: Remove unnecessay UQ10 to UINT conversion drm/amd/pm: Remove unnecessay UQ10 to UINT conversion drm/amdgpu/sdma_v4_4_2: update VM flush implementation for SDMA drm/amdgpu: Optimize VM invalidation engine allocation and synchronize GPU TLB flush drm/amd/amdgpu: Increase max rings to enable SDMA page ring drm/amdgpu: Decode deferred error type in gfx aca bank parser drm/amdgpu/gfx11: Add Cleaner Shader Support for GFX11.5 GPUs drm/amdgpu/mes: clean up SDMA HQD loop drm/amdgpu/mes: enable compute pipes across all MEC drm/amdgpu/mes: drop MES 10.x leftovers drm/amdgpu/mes: optimize compute loop handling drm/amdgpu/sdma: guilty tracking is per instance drm/amdgpu/sdma: fix engine reset handling drm/amdgpu: remove invalid usage of sched.ready drm/amdgpu: add cleaner shader trace point ...
| * drm/msm/dpu: drop wb2_formats_rgbDmitry Baryshkov2025-03-081-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | After enabling YUV support for writeback on a variety of DPU hardware, the wb2_formats_rgb is now unused. Drop it following the report of LKP. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202503071857.oZbQsPaE-lkp@intel.com/ Reviewed-by: Rob Clark <robdclark@gmail.com> # on IRC Patchwork: https://patchwork.freedesktop.org/patch/641848/ Link: https://lore.kernel.org/r/20250308-dpu-drop-wb2-rgb-v1-1-f5503fcd1bc2@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Fix uninitialized variable in dpu_crtc_kickoff_clone_mode()Dan Carpenter2025-03-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | After the loop there is a check for whether "wb_encoder" has been set to non-NULL, however it was never set to NULL. Initialize it to NULL. Fixes: ad06972d5365 ("drm/msm/dpu: Reorder encoder kickoff for CWB") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/641631/ Link: https://lore.kernel.org/r/f8ba03dc-0f90-4781-8d54-c16b3251ecb1@stanley.mountain Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: correct struct dpu_encoder_virt docsDmitry Baryshkov2025-03-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix a typo in struct dpu_encoder_virt kerneldoc, which made it ignore description of the cwb_mask field. Fixes: dd331404ac7c ("drm/msm/dpu: Configure CWB in writeback encoder") Signed-off-by: Dmitry Baryshkov <lumag@kernel.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/641315/ Link: https://lore.kernel.org/r/20250306-dpu-fix-docs-v1-2-e51b71e8ad84@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: correct dpu_crtc_check_mode_changed docsDmitry Baryshkov2025-03-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Correct commit 20972609d12c ("drm/msm/dpu: Require modeset if clone mode status changes") and describe old_crtc_state and new_crtc_state params instead of the single previously used parameter crtc_state. Fixes: 20972609d12c ("drm/msm/dpu: Require modeset if clone mode status changes") Signed-off-by: Dmitry Baryshkov <lumag@kernel.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/641313/ Link: https://lore.kernel.org/r/20250306-dpu-fix-docs-v1-1-e51b71e8ad84@kernel.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Remove duplicate dpu_hw_cwb.h headerJiapeng Chong2025-03-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: dpu_hw_cwb.h is included more than once. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=19239 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: dd331404ac7c ("drm/msm/dpu: Configure CWB in writeback encoder") Patchwork: https://patchwork.freedesktop.org/patch/641543/ Link: https://lore.kernel.org/r/20250307015030.86282-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Adjust CDM_MUX to support CWB PINGPONGJessica Zhang2025-03-071-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Similar to WB_MUX, CDM_MUX also needs to be adjusted to support dedicated CWB PINGPONGs Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/641272/ Link: https://lore.kernel.org/r/20250305-cdm-cwb-mux-fix-v1-1-16148ca6e4d2@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+Jessica Zhang2025-03-0612-24/+24
| | | | | | | | | | | | | | | | | | | | | | Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats on writeback Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/641270/ Signed-off-by: Rob Clark <robdclark@chromium.org>
| * drm/msm/dpu: Clear perf params before calculating bwJessica Zhang2025-03-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | To prevent incorrect BW calculation, zero out dpu_core_perf_params before it is passed into dpu_core_perf_aggregate(). Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Fixes: 795aef6f3653 ("drm/msm/dpu: remove duplicate code calculating sum of bandwidths") Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/641278/ Signed-off-by: Rob Clark <robdclark@chromium.org>
| * drm/msm/a6xx: Fix a6xx indexed-regs in devcoreduumpRob Clark2025-03-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | Somehow, possibly as a result of rebase gone badly, setting nr_indexed_regs for pre-a650 a6xx devices lost the setting of nr_indexed_regs, resulting in values getting snapshot, but omitted from the devcoredump. Fixes: e997ae5f45ca ("drm/msm/a6xx: Mostly implement A7xx gpu_state") Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/640289/
| * drm/msm/dpu: handle perf mode in _dpu_core_perf_crtc_update_bus()Dmitry Baryshkov2025-03-051-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move perf mode handling for the bandwidth to _dpu_core_perf_crtc_update_bus() rather than overriding per-CRTC data and then aggregating known values. Note, this changes the fix_core_ab_vote. Previously it would be multiplied per the CRTC number, now it will be used directly for interconnect voting. This better reflects user requirements in the case of different resolutions being set on different CRTCs: instead of using the same bandwidth for each CRTC (which is incorrect) user can now calculate overall bandwidth required by all outputs and use that value. Note #2: this also disables threshold checks for user-entered bandwidth values. First of all, it doesn't make sense to fail atomic commits because of the debugfs input. Compositors have no way to correlate failing commits with debugfs settings. Second, it makes sense to allow users to go beyond these values and check whether this makes any difference or fixes the issue. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/636072/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-8-87e936cf3004@linaro.org
| * drm/msm/dpu: drop core_clk_rate overrides from _dpu_core_perf_calc_crtcDmitry Baryshkov2025-03-051-3/+1
| | | | | | | | | | | | | | | | | | | | core_clk_rate override is handled in _dpu_core_perf_get_core_clk_rate(). Drop imperfect duplicating code from _dpu_core_perf_calc_crtc(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/636070/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-7-87e936cf3004@linaro.org
| * drm/msm/dpu: rename average bandwidth-related debugfs filesDmitry Baryshkov2025-03-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename the debugfs files to match their purpose and the patter provided by other bandwidth and clock-related files: threshold_high -> max_core_ab threshold_low -> low_core_ab Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636069/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-6-87e936cf3004@linaro.org
| * drm/msm/dpu: also use KBps for bw_ctl outputDmitry Baryshkov2025-03-052-3/+5
| | | | | | | | | | | | | | | | | | | | Change debugfs and log entries to use KBps / u32 for bw_ctl and similar data. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636066/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-5-87e936cf3004@linaro.org
| * drm/msm/dpu: make fix_core_ab_vote consistent with fix_core_ib_voteDmitry Baryshkov2025-03-052-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fix_core_ab_vote is an average bandwidth value, used for bandwidth overrides in several cases. However there is an internal inconsistency: fix_core_ib_vote is defined in KBps, while fix_core_ab_vote is defined in Bps. Fix that by changing the type of the variable to u32 and using * 1000ULL multiplier when setting up the dpu_core_perf_params::bw_ctl value. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/636064/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-4-87e936cf3004@linaro.org
| * drm/msm/dpu: change ib values to u32Dmitry Baryshkov2025-03-053-6/+6
| | | | | | | | | | | | | | | | | | | | | | The IB values in core_perf calculations (max_per_pipe_ib, fix_core_ib_vote) are expressed in KBps and are passed to icc_set_bw without additional division. Change type of those values to u32. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636061/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-3-87e936cf3004@linaro.org
| * drm/msm/dpu: remove duplicate code calculating sum of bandwidthsDmitry Baryshkov2025-03-051-56/+38
| | | | | | | | | | | | | | | | | | | | | | The code in dpu_core_perf_crtc_check() mostly duplicates code in dpu_core_perf_aggregate(). Remove the duplication by reusing the latter function. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636059/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-2-87e936cf3004@linaro.org
| * drm/msm/dpu: extract bandwidth aggregation functionDmitry Baryshkov2025-03-051-20/+25
| | | | | | | | | | | | | | | | | | | | | | In preparation to refactoring the dpu_core_perf debugfs interface, extract the bandwidth aggregation function from _dpu_core_perf_crtc_update_bus(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/636058/ Link: https://lore.kernel.org/r/20250209-dpu-perf-rework-v5-1-87e936cf3004@linaro.org
| * drm/msm/dpu: enable CDM_0 for X Elite platformDmitry Baryshkov2025-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | Enable CDM on the X Elite platform, allowing RGB to YUV conversion for the output. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/638412/ Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-5-77f5f0df3d9a@linaro.org
| * drm/msm/dpu: enable CDM_0 for SC8280XP platformDmitry Baryshkov2025-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | Enable CDM on the SC8280XP platform, allowing RGB to YUV conversion for the output. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/638411/ Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-4-77f5f0df3d9a@linaro.org
| * drm/msm/dpu: enable CDM_0 for DPUs 1.x - 4.xDmitry Baryshkov2025-03-0510-0/+16
| | | | | | | | | | | | | | | | | | | | Enable the CDM_0 block on DPU versions 1.x - 4.x as documented in the vendor dtsi file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/638408/ Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-3-77f5f0df3d9a@linaro.org
| * drm/msm/dpu: enable CDM_0 for DPUs 5.x+Dmitry Baryshkov2025-03-0511-0/+11
| | | | | | | | | | | | | | | | | | | | Enable the CDM_0 block on DPU generations starting from 5.x as documented in the vendor dtsi file. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/638407/ Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-2-77f5f0df3d9a@linaro.org
| * drm/msm/dpu: rename CDM block definitionDmitry Baryshkov2025-03-054-4/+4
| | | | | | | | | | | | | | | | | | | | | | The CDM block is not limited to SC7280, but it is common to all platforms since DPU 5.x. Rename it from sc7280_cdm to dpu_cdm_5_x. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/638405/ Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-1-77f5f0df3d9a@linaro.org
| * drm/msm/dpu: fix error pointer dereference in msm_kms_init_aspace()Dan Carpenter2025-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If msm_gem_address_space_create() fails, then return right away. Otherwise it leads to a Oops when we dereference "aspace" on the next line. Fixes: eabba31a839a ("drm/msm: register a fault handler for display mmu faults") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/639357/ Link: https://lore.kernel.org/r/3221e88c-3351-42e6-aeb1-69f4f014b509@stanley.mountain [DB: fixed commit id] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/hdmi: use DRM HDMI Audio frameworkDmitry Baryshkov2025-03-054-111/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to simplify the driver even further and to remove the boilerplate code, rewrite the audio interface to use the DRM HDMI Audio framework. Audio InfoFames are controlled centrally via the DRM HDMI framework. Correct InfoFrame data is programmed at the atomic_pre_enable() time (if it was set before, drm_atomic_helper_connector_hdmi_update_infoframes() takes care of writing all InfoFrames, including the Audio one.) or during msm_hdmi_bridge_audio_prepare() when the new stream is started. All audio data frame management is deferred to msm_hdmi_bridge_audio_prepare() and msm_hdmi_bridge_audio_shutdown(). Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639663/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-7-340af24b35cc@linaro.org
| * drm/msm/hdmi: also send the SPD and HDMI Vendor Specific InfoFramesDmitry Baryshkov2025-03-051-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend the driver to send SPD and HDMI Vendor Specific InfoFrames. While the HDMI block has special block to send HVS InfoFrame, use GENERIC0 block instead. VENSPEC_INFO registers pack frame data in a way that requires manual repacking in the driver, while GENERIC0 doesn't have such format requirements. The msm-4.4 kernel uses GENERIC0 to send HDR InfoFrame which we do not at this point anyway. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639661/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-6-340af24b35cc@linaro.org
| * drm/msm/hdmi: update HDMI_GEN_PKT_CTRL_GENERIC0_UPDATE definitionDmitry Baryshkov2025-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | The GENERIC0_UPDATE field is a single bit. Redefine it as boolean to simplify its usage in the driver. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639660/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-5-340af24b35cc@linaro.org
| * drm/msm/hdmi: get rid of hdmi_modeDmitry Baryshkov2025-03-053-17/+4
| | | | | | | | | | | | | | | | | | | | | | Use connector->display_info.is_hdmi instead of manually using drm_detect_hdmi_monitor(). Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639657/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-4-340af24b35cc@linaro.org
| * drm/msm/hdmi: make use of the drm_connector_hdmi frameworkDmitry Baryshkov2025-03-055-147/+162
| | | | | | | | | | | | | | | | | | | | | | Setup the HDMI connector on the MSM HDMI outputs. Make use of atomic_check hook and of the provided Infoframe infrastructure. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639656/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-3-340af24b35cc@linaro.org
| * drm/msm/hdmi: program HDMI timings during atomic_pre_enableDmitry Baryshkov2025-03-051-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The mode_set callback is deprecated, it doesn't get the drm_bridge_state, just mode-related argumetns. Also Abhinav pointed out that HDMI timings should be programmed before setting up HDMI PHY and PLL. Rework the code to program HDMI timings at the start of atomic_pre_enable(). Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639652/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-2-340af24b35cc@linaro.org
| * drm/msm/hdmi: switch to atomic bridge callbacksDmitry Baryshkov2025-03-051-4/+9
| | | | | | | | | | | | | | | | | | | | | | Change MSM HDMI bridge to use atomic_* callbacks in preparation to enablign the HDMI connector support. Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/639653/ Link: https://lore.kernel.org/r/20250226-bridge-hdmi-connector-v8-1-340af24b35cc@linaro.org
| * drm/msm/dpu: Set possible clones for all encodersJessica Zhang2025-03-053-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | Set writeback encoders as possible clones for DSI encoders and vice versa. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637498/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-14-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Reorder encoder kickoff for CWBJessica Zhang2025-03-051-14/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper that will handle the correct order of the encoder kickoffs for concurrent writeback. For concurrent writeback, the realtime encoder must always kickoff last as it will call the trigger flush and start. This avoids the following scenario where the writeback encoder increments the pending kickoff count after the WB_DONE interrupt is fired: If the realtime encoder is kicked off first, the encoder kickoff will flush/start the encoder and increment the pending kickoff count. The WB_DONE interrupt then fires (before the writeback encoder is kicked off). When the writeback encoder enters its kickoff, it will skip the flush/start (due to CWB being enabled) and hit a frame done timeout as the frame was kicked off (and the WB_DONE interrupt fired) without the pending kickoff count being incremented. In addition, the writeback timer should only start after the realtime encoder is kicked off to ensure that we don't get timeouts when the system has a heavy load (ex. when debug logs are enabled) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637491/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-13-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Skip trigger flush and start for CWBJessica Zhang2025-03-051-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | For concurrent writeback, the real time encoder is responsible for trigger flush and trigger start. Return early for trigger start and trigger flush for the concurrent writeback encoders. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637505/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-12-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Start frame done timer after encoder kickoffJessica Zhang2025-03-053-10/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting the frame done timer before the encoder is finished kicking off can lead to unnecessary frame done timeouts when the device is experiencing heavy load (ex. when debug logs are enabled). Thus, create a separate API for starting the encoder frame done timer and call it after the encoder kickoff is finished Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637502/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-11-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Adjust writeback phys encoder setup for CWBJessica Zhang2025-03-051-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | Adjust QoS remapper, OT limit, and CDP parameters to account for concurrent writeback Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637490/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-10-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Support CWB in dpu_hw_ctlJessica Zhang2025-03-054-2/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | The CWB mux has a pending flush bit and *_active register. Add support for configuring them within the dpu_hw_ctl layer. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637492/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-9-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Configure CWB in writeback encoderJessica Zhang2025-03-053-3/+83
| | | | | | | | | | | | | | | | | | | | | | | | Cache the CWB block mask in the DPU virtual encoder and configure CWB according to the CWB block mask within the writeback phys encoder Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637501/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-8-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Reserve resources for CWBJessica Zhang2025-03-054-4/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for RM to reserve dedicated CWB PINGPONGs and CWB muxes For concurrent writeback, even-indexed CWB muxes must be assigned to even-indexed LMs and odd-indexed CWB muxes for odd-indexed LMs. The same even/odd rule applies for dedicated CWB PINGPONGs. Track the CWB muxes in the global state and add a CWB-specific helper to reserve the correct CWB muxes and dedicated PINGPONGs following the even/odd rule. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/637495/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-7-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Fail atomic_check if multiple outputs request CDM blockJessica Zhang2025-03-053-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, our hardware only supports a single output using CDM block at most. Because of this, we cannot support cases where both writeback and DP output request CDM simultaneously To avoid this happening when CWB is enabled, change msm_display_topoloy.needs_cdm into a num_cdm counter to track how many outputs are requesting CDM block. Return EINVAL if multiple outputs are trying to reserve CDM. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/637499/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-6-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Require modeset if clone mode status changesJessica Zhang2025-03-053-8/+17
| | | | | | | | | | | | | | | | | | | | | | | | If the clone mode enabled status is changing, a modeset needs to happen so that the resources can be reassigned Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637483/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-5-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: Add CWB to msm_display_topologyJessica Zhang2025-03-053-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the topology is calculated based on the assumption that the user cannot request real-time and writeback simultaneously. For example, the number of LMs and CTLs are currently based off the number of phys encoders under the assumption there will be at least 1 LM/CTL per phys encoder. This will not hold true for concurrent writeback as both phys encoders (1 real-time and 1 writeback) must be driven by 1 LM/CTL when concurrent writeback is enabled. To account for this, add a cwb_enabled flag and only adjust the number of CTL/LMs needed by a given topology based on the number of phys encoders only if CWB is not enabled. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637486/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-4-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| * drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocationDmitry Baryshkov2025-03-055-126/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | Up to now the driver has been using encoder to allocate hardware resources. Switch it to use CRTC id in preparation for the next step. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/637503/ Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-3-a44c293cf422@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-25 00:27:48 +0000