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path: root/drivers/gpu/drm/xe/regs
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* drm/xe/hwmon: Refactor xe hwmonKarthik Poosa2024-02-062-6/+21
* drm/xe/xe2_lpg: Introduce performance guide changesShekhar Chauhan2024-01-231-0/+6
* drm/xe/gsc: add support for GSC proxy interruptDaniele Ceraolo Spurio2024-01-181-0/+2
* drm/xe/xe2_lpg: Add Wa_16018610683Shekhar Chauhan2024-01-091-0/+3
* drm/xe/xe2: synchronise CS_CHICKEN1 with WMTP supportNirmoy Das2024-01-081-0/+1
* drm/xe/xe2: Add workaround 16020183090Lucas De Marchi2023-12-261-0/+4
* drm/xe: Update definition of GT_INTR_DWMichal Wajdeczko2023-12-211-0/+9
* drm/xe: Update LRC context layout definitionsMichal Wajdeczko2023-12-211-0/+9
* drm/xe: Define registers used by memory based irq processingMichal Wajdeczko2023-12-211-0/+2
* drm/xe/pmu: Remove PMU from Xe till uapi is finalizedAshutosh Dixit2023-12-211-5/+0
* drm/xe: Re-sort GT register headerMatt Roper2023-12-211-38/+38
* drm/xe: Define interrupt vector bits with the interrupt registersMatt Roper2023-12-212-6/+5
* drm/xe: Move GSC HECI base offsets out of register headerMatt Roper2023-12-211-4/+0
* drm/xe: Move engine base offsets to engine register headerMatt Roper2023-12-212-28/+33
* drm/xe: Fix whitespace in register definitionsMatt Roper2023-12-212-5/+5
* drm/xe: Move some per-engine register definitions to the engine headerMatt Roper2023-12-213-21/+21
* drm/xe: Drop "_REG" suffix from CSFE_CHICKEN1Matt Roper2023-12-211-5/+4
* drm/xe/xe2: Updates on XY_CTRL_SURF_COPY_BLTHimal Prasad Ghimiray2023-12-211-3/+2
* drm/xe/xe2: Modify main memory to ccs memory ratio.Himal Prasad Ghimiray2023-12-211-1/+1
* drm/xe/xe2: Determine bios enablement for flat ccs on igfxHimal Prasad Ghimiray2023-12-211-0/+3
* drm/xe: Remove duplicate RING_MAX_NONPRIV_SLOTS definitionMatt Roper2023-12-211-1/+0
* drm/xe: Add frequency throttle reasons sysfs attributesSujaritha Sundaresan2023-12-211-0/+12
* drm/xe/pf: Introduce Local Memory Translation TableMichal Wajdeczko2023-12-211-0/+17
* drm/xe: Enable Fixed CCS mode settingNiranjana Vishwanathapura2023-12-211-0/+14
* drm/xe/xe2: Add workaround 18032095049 and 16021639441Tejas Upadhyay2023-12-211-0/+5
* drm/xe/xe2: Add workaround 14019988906Tejas Upadhyay2023-12-211-0/+1
* drm/xe/huc: Prepare for 2-step HuC authenticationDaniele Ceraolo Spurio2023-12-211-0/+2
* drm/xe: Expand XE_REG_OPTION_MASKED documentationLucas De Marchi2023-12-211-1/+10
* drm/xe/xe2: Add workaround 16020292621Tejas Upadhyay2023-12-211-0/+1
* drm/xe: Manually setup C6 when skip_guc_pc is setVinay Belgaumkar2023-12-211-0/+4
* drm/xe: explicitly set GGTT access for GuC DMAFei Yang2023-12-211-0/+1
* drm/xe/gsc: Implement WA 14015076503Daniele Ceraolo Spurio2023-12-211-0/+10
* drm/xe/gsc: GSC FW loadDaniele Ceraolo Spurio2023-12-211-0/+29
* drm/xe/xe2: Add workaround 14020013138Tejas Upadhyay2023-12-211-0/+3
* drm/xe/dg2: Drop Wa_22014600077Matt Roper2023-12-211-1/+0
* drm/xe/xe2: Add workaround 14019449301Tejas Upadhyay2023-12-211-0/+3
* drm/xe/display: Implement display supportMaarten Lankhorst2023-12-212-14/+1
* drm/xe: Raise GT frequency before GuC/HuC loadVinay Belgaumkar2023-12-211-0/+5
* drm/xe/gsc: enable pvc supportAlexander Usyskin2023-12-211-0/+1
* drm/xe/xelpmp: Add Wa_16021867713Gustavo Sousa2023-12-211-0/+3
* drm/xe: implement driver initiated function-resetAndrzej Hajda2023-12-211-0/+7
* drm/xe: Add Wa_14019821291Matt Roper2023-12-211-0/+2
* drm/xe/hwmon: Expose power1_max_intervalBadal Nilawar2023-12-211-0/+8
* drm/xe/xelpmp: Extend Wa_22016670082 to Xe_LPM+Shekhar Chauhan2023-12-211-0/+1
* drm/xe/mocs: MOCS registers are multicast on Xe_HP and beyondMatt Roper2023-12-211-2/+4
* drm/xe: Add performance tuning settings for MTL and Xe2Shekhar Chauhan2023-12-211-0/+2
* drm/xe/xe2: Add initial workaroundsDnyaneshwar Bhadane2023-12-211-0/+24
* drm/xe: Extract MI_* instructions to their own headerMatt Roper2023-12-211-41/+0
* drm/xe: Clarify number of dwords/qwords stored by MI_STORE_DATA_IMMMatt Roper2023-12-211-0/+3
* drm/xe: Separate number of registers from MI_LRI opcodeMatt Roper2023-12-211-1/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 22:49:33 +0000