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path:
root
/
drivers
/
irqchip
/
irq-sifive-plic.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
irqchip/sifive-plic: Support wake IRQs
Samuel Holland
2022-11-28
1
-2
/
+4
*
Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
2022-08-06
1
-3
/
+4
|
\
|
*
riscv: cpu: Add 64bit hartid support on RV64
Sunil V L
2022-07-19
1
-3
/
+4
*
|
irqchip/sifive-plic: Separate the enable and mask operations
Samuel Holland
2022-07-10
1
-21
/
+34
*
|
irqchip/sifive-plic: Make better use of the effective affinity mask
Samuel Holland
2022-07-10
1
-18
/
+9
*
|
irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handling
Samuel Holland
2022-07-01
1
-1
/
+1
*
|
irqchip/sifive-plic: Add support for Renesas RZ/Five SoC
Lad Prabhakar
2022-07-01
1
-4
/
+74
|
/
*
Merge tag 'irqchip-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/maz...
Thomas Gleixner
2022-03-14
1
-12
/
+26
|
\
|
*
irqchip/sifive-plic: Disable S-mode IRQs if running in M-mode
Niklas Cassel
2022-03-02
1
-5
/
+19
|
*
irqchip/sifive-plic: Improve naming scheme for per context offsets
Niklas Cassel
2022-03-02
1
-7
/
+7
*
|
irqchip/sifive-plic: Add missing thead,c900-plic match string
Guo Ren
2022-02-02
1
-0
/
+1
|
/
*
irqchip/sifive-plic: Fixup EOI failed when masked
Guo Ren
2021-11-12
1
-1
/
+7
*
irqchip: Bulk conversion to generic_handle_domain_irq()
Marc Zyngier
2021-06-10
1
-5
/
+3
*
irqchip/sifive-plic: Mark two global variables __ro_after_init
Jisheng Zhang
2021-04-07
1
-2
/
+2
*
irqchip/sifive-plic: Fix chip_data access within a hierarchy
Greentime Hu
2020-11-01
1
-4
/
+4
*
irqchip/sifive-plic: Fix broken irq_set_affinity() callback
Greentime Hu
2020-10-25
1
-1
/
+1
*
irqchip: RISC-V per-HART local interrupt controller driver
Anup Patel
2020-06-09
1
-9
/
+23
*
RISC-V: Rename and move plic_find_hart_id() to arch directory
Anup Patel
2020-06-09
1
-15
/
+1
*
irqchip/sifive-plic: Improve boot prints for multiple PLIC instances
Anup Patel
2020-05-25
1
-2
/
+2
*
irqchip/sifive-plic: Setup cpuhp once after boot CPU handler is present
Anup Patel
2020-05-25
1
-2
/
+12
*
irqchip/sifive-plic: Set default irq affinity in plic_irqdomain_map()
Anup Patel
2020-05-25
1
-0
/
+3
*
irqchip/sifive-plic: Remove incorrect requirement about number of irq contexts
Wesley W. Terpstra
2020-05-18
1
-2
/
+0
*
irqchip/sifive-plic: Fix maximum priority threshold value
Atish Patra
2020-04-17
1
-1
/
+1
*
irqchip/sifive-plic: Add support for multiple PLICs
Atish Patra
2020-03-16
1
-30
/
+51
*
irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
Atish Patra
2020-03-16
1
-4
/
+34
*
Merge tag 'irqchip-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/...
Thomas Gleixner
2020-01-24
1
-4
/
+26
|
\
|
*
irqchip/sifive-plic: Support irq domain hierarchy
Yash Shah
2020-01-20
1
-4
/
+26
*
|
riscv: prefix IRQ_ macro names with an RV_ namespace
Paul Walmsley
2020-01-04
1
-1
/
+1
|
/
*
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
2019-11-05
1
-4
/
+7
*
Merge tag 'irqchip-fixes-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/...
Thomas Gleixner
2019-10-25
1
-2
/
+2
|
\
|
*
irqchip/sifive-plic: Skip contexts except supervisor in plic_init()
Alan Mikhak
2019-10-25
1
-2
/
+2
*
|
Merge tag 'irqchip-fixes-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/...
Thomas Gleixner
2019-10-14
1
-14
/
+15
|
\
|
|
*
irqchip/sifive-plic: Switch to fasteoi flow
Marc Zyngier
2019-09-18
1
-14
/
+15
*
|
irqchip/sifive-plic: set max threshold for ignored handlers
Christoph Hellwig
2019-09-05
1
-2
/
+10
|
/
*
irqchip/sifive-plic: Implement irq_set_affinity() for SMP host
Anup Patel
2019-02-21
1
-6
/
+39
*
irqchip/sifive-plic: Differentiate between PLIC handler and context
Anup Patel
2019-02-21
1
-8
/
+8
*
irqchip/sifive-plic: Add warning in plic_init() if handler already present
Anup Patel
2019-02-21
1
-0
/
+5
*
irqchip/sifive-plic: Pre-compute context hart base and enable base
Anup Patel
2019-02-21
1
-26
/
+21
*
irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid.
Atish Patra
2019-02-14
1
-0
/
+5
*
RISC-V: Use Linux logical CPU number instead of hartid
Atish Patra
2018-10-22
1
-3
/
+5
*
RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Palmer Dabbelt
2018-10-22
1
-1
/
+1
*
irqchip: add a SiFive PLIC driver
Christoph Hellwig
2018-08-13
1
-0
/
+260