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* mtd: rawnand: sunxi: Annotate struct sunxi_nand_chip with __counted_byKees Cook2023-09-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct sunxi_nand_chip. [1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Jernej Skrabec <jernej.skrabec@gmail.com> Cc: Samuel Holland <samuel@sholland.org> Cc: Manuel Dipolt <mdipolt@robart.cc> Cc: linux-mtd@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@lists.linux.dev Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230915201300.never.057-kees@kernel.org
* Merge tag 'nand/for-6.6' into mtd/nextMiquel Raynal2023-08-281-25/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Raw NAND core changes: * Fix -Wvoid-pointer-to-enum-cast warning * Export 'nand_exit_status_op()' * dt-bindings: Fix nand-controller.yaml license Raw NAND controller driver changes: * Omap, Omap2, Samsung, Atmel, fsl_upm, lpc32xx_slc, lpc32xx_mlc, STM32_FMC2, sh_ftlctl, MXC, Sunxi: - Use devm_platform_get_and_ioremap_resource() * Orion, vf610_nfc, Sunxi, STM32_FMC2, MTK, mpc5121, lpc32xx_slc, Intel, FSMC, Arasan: - Use helper function devm_clk_get_optional_enabled() * Brcmnand: - Use devm_platform_ioremap_resource_byname() - Propagate init error -EPROBE_DEFER up - Propagate error and simplify ternary operators - Fix mtd oobsize - Fix potential out-of-bounds access in oob write - Fix crash during the panic_write - Fix potential false time out warning - Fix ECC level field setting for v7.2 controller * fsmc: Handle clk prepare error in fsmc_nand_resume() * Marvell: Add support for AC5 SoC * Meson: - Support for 512B ECC step size - Fix build error - Use NAND core API to check status - dt-bindings: * Make ECC properties dependent * Support for 512B ECC step size * Drop unneeded quotes * Oxnas: Remove driver and bindings * Qcom: - Conversion to ->exec_op() - Removal of the legacy interface - Two full series of improvements/misc fixes * Use the BIT() macro * Use u8 instead of uint8_t * Fix alignment with open parenthesis * Fix the spacing * Fix wrong indentation * Fix a typo * Early structure initialization * Fix address parsing within ->exec_op() * Remove superfluous initialization of "ret" * Rename variables in qcom_op_cmd_mapping() * Handle unsupported opcode in qcom_op_cmd_mapping() * Fix the opcode check in qcom_check_op() * Use EOPNOTSUPP instead of ENOTSUPP * Wrap qcom_nand_exec_op() to 80 columns * Unmap sg_list and free desc within submic_descs() * Simplify the call to nand_prog_page_end_op() * Do not override the error no of submit_descs() * Sort includes alphabetically * Clear buf_count and buf_start in raw read * Add read/read_start ops in exec_op path * vf610_nfc: Do not check 0 for platform_get_irq() SPI-NAND changes: * gigadevice: Add support for GD5F1GQ{4,5}RExxH * esmt: Add support for F50D2G41KA * toshiba: Add support for T{C,H}58NYG{0,2}S3HBAI4 and TH58NYG3S0HBAI6 Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: rawnand: sunxi: Use helper function devm_clk_get_enabled()Li Zetao2023-08-211-23/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 7ef9651e9792 ("clk: Provide new devm_clk helpers for prepared and enabled clocks"), devm_clk_get() and clk_prepare_enable() can now be replaced by devm_clk_get_enabled() when driver enables (and possibly prepares) the clocks for the whole lifetime of the device. Moreover, it is no longer necessary to unprepare and disable the clocks explicitly, so drop the label "out_mod_clk_unprepare" and "out_ahb_clk_unprepare". Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Li Zetao <lizetao1@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230821031737.1973183-10-lizetao1@huawei.com
| * mtd: rawnand: sunxi: Use devm_platform_get_and_ioremap_resource()Yangtao Li2023-07-121-2/+1
| | | | | | | | | | | | | | | | | | | | | | Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230707040622.78174-1-frank.li@vivo.com
* | mtd: Explicitly include correct DT includesRob Herring2023-07-271-1/+0
|/ | | | | | | | | | | | | | | | | The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it was merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230714174751.4060439-1-robh@kernel.org
* mtd: nand: Convert to platform remove callback returning voidUwe Kleine-König2023-04-111-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> # atmel Reviewed-by: Paul Cercueil <paul@crapouillou.net> # ingenic Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> # ingenic Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> # intel Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> # meson Acked-by: Roger Quadros <rogerq@kernel.org> # omap_elm Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Reviewed-by: Heiko Stuebner <heiko@sntech.de> # rockchip Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> # sunxi Acked-by: Thierry Reding <treding@nvidia.com> # tegra Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230411113816.3472237-1-u.kleine-koenig@pengutronix.de
* mtd: rawnand: sunxi: Precompute the ECC_CTL register valueSamuel Holland2023-02-061-17/+10
| | | | | | | | | | The value computed by this function never changes for a given chip. Compute the whole register value once up front, instead of every time the ECC engine is enabled. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230204143520.9682-4-samuel@sholland.org
* mtd: rawnand: sunxi: Embed sunxi_nand_hw_ecc by valueSamuel Holland2023-02-061-39/+6
| | | | | | | | | | | The sunxi_nand_hw_ecc object is not shared, and it has the same lifetime as the sunxi_nand_chip which points to it, so we can embed it in the outer structure instead of using a pointer. This removes an unnecessary memory allocation and simplifies the error handling code. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230204143520.9682-3-samuel@sholland.org
* mtd: rawnand: sunxi: Update OOB layout to match hardwareSamuel Holland2023-02-061-0/+7
| | | | | | | | | | | | | | | | When using the hardware ECC engine, the OOB data is made available in the NFC_REG_USER_DATA registers, as one 32-bit word per ECC step. Any additional bytes are only accessible through raw reads and software descrambling. For efficiency, and to match the vendor driver, ignore these extra bytes when using hardware ECC. Note that until commit 34569d869532 ("mtd: rawnand: sunxi: Fix the size of the last OOB region"), this extra free area was reported with length zero, so this is not a functional change for any stable kernel user. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230204143520.9682-2-samuel@sholland.org
* mtd: rawnand: sunxi: Fix the size of the last OOB regionSamuel Holland2023-01-021-1/+1
| | | | | | | | | | The previous code assigned to the wrong structure member. Fixes: c66811e6d350 ("mtd: nand: sunxi: switch to mtd_ooblayout_ops") Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-By: Dhruva Gole <d-gole@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-6-samuel@sholland.org
* mtd: rawnand: sunxi: Remove an unnecessary checkSamuel Holland2023-01-021-6/+0
| | | | | | | | | Each chip is required to have a unique CS number ("reg" property) in the range 0-7, so there is no need to separately count the number of chips. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-4-samuel@sholland.org
* mtd: rawnand: sunxi: Remove an unnecessary checkSamuel Holland2023-01-021-1/+1
| | | | | | | | sunxi_nand->nsels cannot be zero, so the second check implies the first. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-3-samuel@sholland.org
* mtd: rawnand: sunxi: Clean up chips after failed initSamuel Holland2023-01-021-19/+20
| | | | | | | | | | If a chip fails to initialize, we need to clean up any chips that were already initialized/registered. Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20221229181526.53766-2-samuel@sholland.org
* mtd: rawnand: sunxi: remove unnecessary oom messageZhen Lei2021-06-111-3/+1
| | | | | | | | | | | Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210610020620.14970-1-thunder.leizhen@huawei.com
*-. Merge tags 'spi-nor/for-5.11' and 'nand/for-5.11' into mtd/nextMiquel Raynal2020-12-161-58/+90
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI NOR core changes: - Initial support for stateful Octal DTR mode using volatile settings - Preliminary support for JEDEC 251 (xSPI) and JEDEC 216D standards - Support for Cypress Semper flash - Support to specify ECC block size of SPI NOR flashes - Fixes to avoid clearing of non-volatile Block Protection bits at probe Generic NAND core: * ECC management: - Add an I/O request tweaking mechanism - Entire rework of the software BCH ECC driver, creation of a real ECC engine, getting rid of raw NAND structures, migration to more generic prototypes, misc fixes and style cleanup. Moved now to the Generic NAND layer. - Entire rework of the software Hamming ECC driver, creation of a real ECC engine, getting rid of raw NAND structures, misc renames, comment updates, cleanup, and style fixes. Moved now to the generic NAND layer. - Necessary plumbing at the NAND level to retrieve generic NAND ECC engines (softwares and on-die). - Update of the bindings. Raw NAND core: * Geting rid of the chip->ecc.priv entry. * Fix miscellaneous typos in kernel-doc Raw NAND controller drivers: * AU1550: Ensure the presence of the right includes * Davinci: Do not use extra dereferencing * GPMI: - Fix the driver only sense CS0 R/B issue - Fix the random DMA timeout issue - Use a single line for of_device_id - Use of_device_get_match_data() - Fix reference count leak in gpmi ops - Cleanup makefile - Fix binding matching of clocks on different SoCs * Ingenic: remove redundant get_device() in ingenic_ecc_get() * Intel LGM: New NAND controller driver * Marvell: Drop useless line * Meson: - Fix a resource leak in init - Fix meson_nfc_dma_buffer_release() arguments * mxc: - Use device_get_match_data() - Use a single line for of_device_id - Remove platform data support * Qcom: - Add support for SDX55 - Support for IPQ6018 QPIC NAND controller - Fix DMA sync on FLASH_STATUS register read * Rockchip: New NAND controller driver for RK3308, RK2928 and others * Sunxi: Add MDMA support SPI-NAND core: * Creation of a SPI-NAND on-die ECC engine * Move ECC related definitions earlier in the driver * Fix typo in comment * Fill a default ECC provider/algorithm * Remove outdated comment * Fix OOB read * Allow the case where there is no ECC engine * Use the external ECC engine logic SPI-NAND chip drivers: * Micron: - Add support for MT29F2G01AAAED - Use more specific names * Macronix: - Add support for MX35LFxG24AD - Add support for MX35LFxGE4AD Others: * onenand: Use mtd->oops_panic_write as condition * plat-ram: correctly free memory on error path in platram_probe()
| | * mtd: rawnand: sunxi: Add MDMA supportManuel Dipolt2020-12-101-44/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables NAND MDMA (MBUS DMA) mode for the Allwinner SoCs A23/A33/H3. The DMA transfer method gets sets now to MBUS DMA as default for the sun8i-a23-nand-controller (till now DMA transfer was executed via the shared DMA engine). The main advantage is more bandwidth for the users of the shared DMA engine and also that the MBUS DMA setup requires less configuration effort. For example you don't need to define a dedicated DMA channel in the device-tree any more. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Manuel Dipolt <manuel.dipolt@robart.cc> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/154840787.280672.1602517282173.JavaMail.zimbra@robart.cc
| | * mtd: rawnand: Get rid of chip->ecc.privMiquel Raynal2020-12-101-14/+17
| |/ | | | | | | | | | | | | | | | | | | | | | | nand_ecc_ctrl embeds a private pointer which only has a meaning in the sunxi driver. This structure will soon be deprecated, but as this field is actually not needed, let's just drop it. Cc: Maxime Ripard <mripard@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-11-miquel.raynal@bootlin.com
* / mtd: rawnand: sunxi: Document 'sunxi_nfc's 'caps' memberLee Jones2020-11-201-0/+1
|/ | | | | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/mtd/nand/raw/sunxi_nand.c:250: warning: Function parameter or member 'caps' not described in 'sunxi_nfc' Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Boris BREZILLON <b.brezillon.dev@gmail.com> Cc: Qiang Yu <yuq825@gmail.com> Cc: Dmitriy B <rzk333@gmail.com> Cc: Sergey Lapin <slapin@ossfans.org> Cc: linux-mtd@lists.infradead.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201109182206.3037326-21-lee.jones@linaro.org
* mtd: rawnand: Use the NAND framework user_conf object for ECC flagsMiquel Raynal2020-09-301-1/+2
| | | | | | | | | | Instead of storing the ECC flags in chip->ecc.options, use nanddev->ecc.user_conf.flags. There is currently only one to save: NAND_ECC_MAXIMIZE. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-21-miquel.raynal@bootlin.com
* mtd: rawnand: Use nanddev_get/set_ecc_requirements() when relevantMiquel Raynal2020-09-281-2/+4
| | | | | | | Instead of accessing ->strength/step_size directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-15-miquel.raynal@bootlin.com
* mtd: rawnand: Use the new ECC engine type enumerationMiquel Raynal2020-09-281-9/+9
| | | | | | | | | | | | Mechanical switch from the legacy "mode" enumeration to the new "engine type" enumeration in drivers and board files. The device tree parsing is also updated to return the new enumeration from the old strings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
* mtd: rawnand: s/data_interface/interface_config/Miquel Raynal2020-06-261-3/+3
| | | | | | | | | | The name/suffix data_interface is a bit misleading in that the field or functions actually represent a configuration that can be applied by the controller/chip. Let's rename all fields/functions/hooks that are worth renaming. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Stop using nand_release()Miquel Raynal2020-05-311-2/+7
| | | | | | | | | | | This helper is not very useful and very often people get confused: they use nand_release() instead of nand_cleanup(). Let's stop using nand_release() by calling mtd_device_unregister() and nand_cleanup() directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-55-miquel.raynal@bootlin.com
* mtd: rawnand: sunxi: Fix the probe error pathMiquel Raynal2020-05-311-1/+1
| | | | | | | | | | nand_release() is supposed be called after MTD device registration. Here, only nand_scan() happened, so use nand_cleanup() instead. Fixes: 1fef62c1423b ("mtd: nand: add sunxi NAND flash controller support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-54-miquel.raynal@bootlin.com
* mtd: rawnand: Rename a NAND chip optionMiquel Raynal2020-05-111-1/+1
| | | | | | | | | | | | | | | | | NAND controller drivers can set the NAND_USE_BOUNCE_BUFFER flag to a chip 'option' field. With this flag, the core is responsible of providing DMA-able buffers. The current behavior is to not force the use of a bounce buffer when the core thinks this is not needed. So in the end the name is a bit misleading, because in theory we will always have a DMA buffer but in practice it will not always be a bounce buffer. Rename this flag NAND_USES_DMA to be more accurate. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-4-miquel.raynal@bootlin.com
* mtd: rawnand: Take check_only into accountBoris Brezillon2020-05-101-1/+2
| | | | | | | | | | | | ->exec_op() is passed a check_only argument that encodes when the controller should just check whether the operation is supported or not without executing it. Some controllers simply ignore this arguments, others don't but keep modifying some of the registers before returning. Let's fix all those drivers. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200418194217.1016060-1-boris.brezillon@collabora.com
* mtd: rawnand: sunxi: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi2020-03-111-5/+10
| | | | | | | | | | | | | dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200227123749.24064-5-peter.ujfalusi@ti.com
* mtd: rawnand: Replace zero-length array with flexible-array memberGustavo A. R. Silva2020-03-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200226222722.GA18020@embeddedor
* mtd: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-10-081-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Add A23/A33 DMA support with extra MBUS configurationMiquel Raynal2019-07-051-0/+24
| | | | | | | | | | | | | Allwinner NAND controllers can make use of DMA to enhance the I/O throughput thanks to ECC pipelining. DMA handling with A23/A33 NAND IP is a bit different than with the older SoCs, hence the introduction of a new compatible to handle: * the differences between register offsets, * the burst length change from 4 to minimum 8, * manage SRAM accesses through MBUS with extra configuration. Fixes: c49836f05aa1 ("mtd: rawnand: sunxi: Add A23/A33 DMA support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* Revert "mtd: rawnand: sunxi: Add A23/A33 DMA support"Miquel Raynal2019-07-051-36/+2
| | | | | | | | | | This reverts commit c49836f05aa15282f7280e06ede3f6f8a6324833. The commit is wrong and its approach actually does not work. Let's revert it in order to add the feature with a clean patch. Fixes: c49836f05aa1 ("mtd: rawnand: sunxi: Add A23/A33 DMA support") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Add A23/A33 DMA supportMiquel Raynal2019-04-181-2/+36
| | | | | | | | | | | | Allwinner NAND controllers can make use of DMA to enhance the I/O throughput thanks to ECC pipelining. DMA handling with A23/A33 NAND IP is a bit different than with the older SoCs, hence the introduction of a new compatible to handle: * the differences between register offsets, * the burst length change from 4 to minimum 8, * drive SRAM accesses through the AHB bus instead of the MBUS. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Add a platform data structureMiquel Raynal2019-04-181-5/+32
| | | | | | | | Before the introduction of A33 NAND DMA support, let's use a platform data structure for parameters that will differ. Right now, there is only one compatible with one data structure. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Get rid of chip->ecc_{strength,step}_dsBoris Brezillon2019-04-081-2/+2
| | | | | | | | | | | | nand_device embeds a nand_ecc_req object which contains the minimum strength and step-size required by the NAND device. Drop the chip->ecc_{strength,step}_ds fields and use chip->base.eccreq.{strength,step_size} instead. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
* mtd: rawnand: Provide a helper to get chip->data_bufBoris Brezillon2019-04-081-6/+5
| | | | | | | | | | | | | We plan to move cache related fields to a pagecache struct in nand_chip but some drivers access ->pagebuf directly to invalidate the cache before they start using ->data_buf. Let's provide an helper that returns a pointer to ->data_buf after invalidating the cache. Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
* mtd: rawnand: sunxi: Handle the tREA > tRC / 2 caseBoris Brezillon2019-02-051-3/+19
| | | | | | | | | | | | | | | In non-EDO, tREA should be less than tRP to guarantee that the controller does not sample the IO lines too early. Unfortunately, the sunxi NAND controller does not allow us to have different values for tRP and tREH (tRP = tREH = tRW / 2). We have 2 options to overcome this limitation: 1/ Extend tRC to fulfil the tREA <= tRC / 2 constraint 2/ Use EDO mode (only works if timings->tRLOH > 0) Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Fix kernel doc headersBoris Brezillon2019-02-051-30/+30
| | | | | | | | | | Fix the struct description and use standard kernel-doc header format (even if the file is not parsed by the doc generator). We also replace tabs by a single space. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Migrate to ->exec_op()Boris Brezillon2019-02-051-120/+174
| | | | | | | And get rif of all legacy hooks and unused fields. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Add an SPDX tagBoris Brezillon2019-02-051-11/+2
| | | | | | | | Replace the license text by an SPDX tag and fix MODULE_LICENSE() to match GPL-2.0+. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Stop passing mtd_info objects aroundBoris Brezillon2019-02-051-110/+94
| | | | | | | Replace them by nand_chip pointers. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Name nand_chip objects consistentlyBoris Brezillon2019-02-051-52/+51
| | | | | | | | nand_chip objects are sometimes called chip and sometimes nand. Rename all of them into nand to make things consistent. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Use struct_size()Boris Brezillon2019-02-051-3/+1
| | | | | | | Use struct_size() to calculate sunxi_nand object size. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Use a consistent name for sunxi_nand_chip objectsBoris Brezillon2019-02-051-27/+29
| | | | | | | | | sunxi_nand_chip objects are sometimes called chip and other times called sunxi_nand. Make that consistent and name all occurrences sunxi_nand. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: sunxi: Write pageprog related opcodes to WCMD_SETBoris Brezillon2018-12-171-1/+1
| | | | | | | | | | | The opcodes used by the controller when doing batched page prog should be written in NFC_REG_WCMD_SET not FC_REG_RCMD_SET. Luckily, the default NFC_REG_WCMD_SET value matches the one we set in the driver which explains why we didn't notice the problem. Fixes: 614049a8d904 ("mtd: nand: sunxi: add support for DMA assisted operations") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Move ->setup_data_interface() to nand_controller_opsBoris Brezillon2018-12-071-1/+1
| | | | | | | | | | | | | ->setup_data_interface() is a controller specific method and should thus be placed in nand_controller_ops. In order to make that work with controllers that support keeping pre-configured timings we need to add a new NAND_KEEP_TIMINGS flag to inform the core it should skip the timings selection step. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Deprecate the ->select_chip() hookBoris Brezillon2018-12-071-1/+1
| | | | | | | | | | | Now that the CS line to be selected is passed to ->exec_op() and stored in chip->cur_cs and after patching all drivers implementing ->exec_op() to stop implementing this method, we can deprecate it by moving it to the nand_legacy structure. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Deprecate ->chip_delayBoris Brezillon2018-10-031-1/+1
| | | | | | | | | The wait timeouts and delays are directly extracted from the NAND timings and ->chip_delay is only used in legacy path, so let's move it to the nand_legacy struct to make it clear. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Deprecate ->dev_ready() and ->waitfunc()Boris Brezillon2018-10-031-2/+2
| | | | | | | | Those hooks have been replaced by ->exec_op(). Move them to the nand_legacy struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Deprecate ->cmd_ctrl() and ->cmdfunc()Boris Brezillon2018-10-031-1/+1
| | | | | | | | Those hooks have been replaced by ->exec_op(). Move them to the nand_legacy struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Deprecate ->{read, write}_{byte, buf}() hooksBoris Brezillon2018-10-031-3/+3
| | | | | | | | All those hooks have been replaced by ->exec_op(). Move them to the nand_legacy struct. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-21 22:07:15 +0000