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* mtd: spi-nor: avoid holes in struct spi_mem_opArnd Bergmann2023-07-271-2/+2
* mtd: spi-nor: Fix divide by zero for spi-nor-generic flashesTudor Ambarus2023-05-261-1/+4
* mtd: spi-nor: spansion: make sure local struct does not contain garbageTudor Ambarus2023-05-261-2/+2
* Merge tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/...Linus Torvalds2023-04-2514-156/+1070
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| * Merge tag 'spi-nor/for-6.4' into mtd/nextMiquel Raynal2023-04-1913-154/+1068
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| | * mtd: spi-nor: spansion: Add support for s25hl02gt and s25hs02gtTakahiro Kuwano2023-04-081-0/+12
| | * mtd: spi-nor: spansion: Add a new ->ready() hook for multi-chip deviceTakahiro Kuwano2023-04-081-24/+85
| | * mtd: spi-nor: spansion: Rework cypress_nor_quad_enable_volatile() for multi-c...Takahiro Kuwano2023-04-081-21/+39
| | * mtd: spi-nor: spansion: Rework cypress_nor_get_page_size() for multi-chip dev...Takahiro Kuwano2023-04-081-20/+69
| | * mtd: spi-nor: sfdp: Add support for SCCR map for multi-chip deviceTakahiro Kuwano2023-04-081-0/+66
| | * mtd: spi-nor: Extract volatile register offset from SCCR mapTakahiro Kuwano2023-04-082-0/+17
| | * mtd: spi-nor: Allow post_sfdp hook to return errorsTudor Ambarus2023-04-084-10/+25
| | * mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_sizeTudor Ambarus2023-04-081-6/+5
| | * mtd: spi-nor: spansion: Enable JFFS2 write buffer for S25FS256TTakahiro Kuwano2023-04-081-7/+1
| | * mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s25hx SEMPER f...Takahiro Kuwano2023-04-081-5/+2
| | * mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER f...Takahiro Kuwano2023-04-084-1/+17
| | * mtd: spi-nor: spansion: Determine current address modeTakahiro Kuwano2023-04-041-3/+128
| | * mtd: spi-nor: core: Introduce spi_nor_set_4byte_addr_mode()Tudor Ambarus2023-04-042-5/+31
| | * mtd: spi-nor: core: Update flash's current address mode when changing address...Tudor Ambarus2023-04-041-1/+3
| | * mtd: spi-nor: Stop exporting spi_nor_restore()Tudor Ambarus2023-04-041-2/+1
| | * mtd: spi-nor: Set the 4-Byte Address Mode method based on SFDP dataTudor Ambarus2023-04-046-12/+71
| | * mtd: spi-nor: core: Make spi_nor_set_4byte_addr_mode_brwr publicTudor Ambarus2023-04-042-1/+2
| | * mtd: spi-nor: core: Update name and description of spi_nor_set_4byte_addr_modeTudor Ambarus2023-04-044-6/+8
| | * mtd: spi-nor: core: Update name and description of spansion_set_4byte_addr_modeTudor Ambarus2023-04-041-4/+9
| | * mtd: spi-nor: core: Update name and description of micron_st_nor_set_4byte_ad...Tudor Ambarus2023-04-043-5/+7
| | * mtd: spi-nor: core: Move generic method to core - micron_st_nor_set_4byte_add...Tudor Ambarus2023-04-043-24/+25
| | * mtd: spi-nor: macronix: Add support for mx25uw51245g with RWWMiquel Raynal2023-04-041-0/+3
| | * mtd: spi-nor: Delay the initialization of bank_sizeMiquel Raynal2023-04-041-1/+2
| | * mtd: spi-nor: Fix a trivial typoMiquel Raynal2023-04-041-1/+1
| | * mtd: spi-nor: Enhance locking to support reads while writesMiquel Raynal2023-03-291-16/+321
| | * mtd: spi-nor: Add a RWW flagMiquel Raynal2023-03-293-0/+7
| | * mtd: spi-nor: Prepare the introduction of a new locking mechanismMiquel Raynal2023-03-291-6/+53
| | * mtd: spi-nor: Separate preparation and lockingMiquel Raynal2023-03-291-4/+20
| | * mtd: spi-nor: Reorder the preparation vs. locking stepsMiquel Raynal2023-03-295-21/+18
| | * mtd: spi-nor: Add a macro to define more banksMiquel Raynal2023-03-291-0/+4
| | * mtd: spi-nor: Introduce the concept of bankMiquel Raynal2023-03-293-5/+13
| | * mtd: spi-nor: spansion: Add support for Infineon S25FS256TTakahiro Kuwano2023-03-171-0/+60
| | * mtd: spi-nor: spansion: Make RD_ANY_REG_OP macro take number of dummy bytesTakahiro Kuwano2023-03-171-5/+5
| * | mtd: Use of_property_read_bool() for boolean propertiesRob Herring2023-03-221-2/+2
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* / mtd: spi-nor: fix memory leak when using debugfs_lookup()Greg Kroah-Hartman2023-03-063-4/+23
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* mtd: spi-nor: Sort headers alphabeticallyTudor Ambarus2023-02-063-9/+8
* mtd: spi-nor: Fix shift-out-of-bounds in spi_nor_set_erase_typeLouis Rannou2023-02-063-2/+12
* mtd: spi-nor: Create macros to define chip IDs and geometriesMiquel Raynal2023-01-261-23/+20
* mtd: spi-nor: spansion: Make CFRx reg fields genericTudor Ambarus2023-01-261-11/+11
* mtd: spi-nor: spansion: Consider reserved bits in CFR5 registerTudor Ambarus2023-01-261-2/+7
* mtd: spi-nor: core: fix implicit declaration warningZeng Heng2023-01-261-0/+1
* mtd: spi-nor: sfdp: Use SFDP_DWORD() macro for optional parameter tablesTakahiro Kuwano2022-12-261-12/+16
* mtd: spi-nor: sfdp: Rename BFPT_DWORD() macro to SFDP_DWORD()Takahiro Kuwano2022-12-264-29/+28
* mtd: spi-nor: sfdp: Fix index value for SCCR dwordsTakahiro Kuwano2022-12-261-1/+1
* Merge tag 'spi-nor/for-6.2' into mtd/nextMiquel Raynal2022-12-0511-45/+211
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