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* mtd: spi-nor: fix flash probingMichael Walle2024-09-141-1/+2
| | | | | | | | | | | | | | | | | | Fix flash probing by name. Flash entries without a name are allowed since commit 15eb8303bb42 ("mtd: spi-nor: mark the flash name as obsolete"). But it was just until recently that a flash entry without a name was actually introduced. This triggers a bug in the legacy probe by name path. Skip entries without a name to fix it. Fixes: 2095e7da8049 ("mtd: spi-nor: spansion: Add support for S28HS256T") Reported-by: Jon Hunter <jonathanh@nvidia.com> Closes: https://lore.kernel.org/r/66c8ebb0-1324-4ad9-9926-8d4eb7e1e63a@nvidia.com/ Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240909072854.812206-1-mwalle@kernel.org
* mtd: spi-nor: spansion: Add support for S28HS256TTakahiro Kuwano2024-09-141-0/+4
| | | | | | | | | | | Infineon S28HS256T is 256Mb Octal SPI device which has same functionalities with 512Mb and 1Gb parts. Link: https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c8fc2dd9c018fc66787aa0657 Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240830080428.6994-1-Takahiro.Kuwano@infineon.com
* mtd: spi-nor: winbond: add Zetta ZD25Q128C supportMichael Walle2024-09-141-0/+26
| | | | | | | | | | | | | | Zetta normally uses BAh as its vendor ID. But for the ZD25Q128C they took the one from Winbond and messed up the size parameters in SFDP. Most functions seem compatible with the W25Q128, we just have to fix up the size. Link: http://www.zettadevice.com/upload/file/20150821/DS_Zetta_25Q128_RevA.pdf Link: https://www.lcsc.com/datasheet/lcsc_datasheet_2312081757_Zetta-ZD25Q128CSIGT_C19626875.pdf Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240804221535.291923-1-mwalle@kernel.org
* mtd: spi-nor: micron-st: Add n25q064a WP supportBrian Norris2024-09-141-0/+2
| | | | | | | | | | | | These flash chips are used on Google / TP-Link / ASUS OnHub devices, and OnHub devices are write-protected by default (same as any other ChromeOS/Chromebook system). I've referred to datasheets, and tested on OnHub devices. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240726185825.142733-1-computersforpeace@gmail.com
* mtd: spi-nor: sst: Factor out common write operation to `sst_nor_write_data()`Csókás, Bence2024-09-141-20/+19
| | | | | | | | | | | | | | | | Writing to the Flash in `sst_nor_write()` is a 3-step process: first an optional one-byte write to get 2-byte-aligned, then the bulk of the data is written out in vendor-specific 2-byte writes. Finally, if there's a byte left over, another one-byte write. This was implemented 3 times in the body of `sst_nor_write()`. To reduce code duplication, factor out these sub-steps to their own function. Signed-off-by: Csókás, Bence <csokas.bence@prolan.hu> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> [pratyush@kernel.org: fixup whitespace, use %zu instead of %i in WARN()] Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240710091401.1282824-1-csokas.bence@prolan.hu
* mtd: spi-nor: winbond: fix w25q128 regressionMichael Walle2024-06-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Commit 83e824a4a595 ("mtd: spi-nor: Correct flags for Winbond w25q128") removed the flags for non-SFDP devices. It was assumed that it wasn't in use anymore. This wasn't true. Add the no_sfdp_flags as well as the size again. We add the additional flags for dual and quad read because they have been reported to work properly by Hartmut using both older and newer versions of this flash, the similar flashes with 64Mbit and 256Mbit already have these flags and because it will (luckily) trigger our legacy SFDP parsing, so newer versions with SFDP support will still get the parameters from the SFDP tables. Reported-by: Hartmut Birr <e9hack@gmail.com> Closes: https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/ Fixes: 83e824a4a595 ("mtd: spi-nor: Correct flags for Winbond w25q128") Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Michael Walle <mwalle@kernel.org> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Esben Haabendal <esben@geanix.com> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240621120929.2670185-1-mwalle@kernel.org
* mtd: spi-nor: simplify spi_nor_get_flash_info()Michael Walle2024-06-181-18/+14
| | | | | | | | | | | Rework spi_nor_get_flash_info() to make it look more straight forward and esp. don't return early. The latter is a preparation to check for deprecated flashes. Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240603134055.1859863-1-mwalle@kernel.org
* mtd: spi-nor: get rid of SPI_NOR_NO_FRMichael Walle2024-05-273-13/+17
| | | | | | | | | | | | | The Everspin FRAM devices are the only user of the NO_FR flag. Drop the global flag and instead use a manufacturer fixup for the Everspin flashes to drop the fast read support. Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> [pratyush@kernel.org: s/evervision/everspin/g in code and commit message] Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240419141249.609534-5-mwalle@kernel.org
* mtd: spi-nor: remove .setup() callbackMichael Walle2024-05-272-65/+45
| | | | | | | | | | | | | | With the removal of the Xilinx flashes, there is no more flash driver using that hook. The original intention was to let the driver configure special requirements like page size an opcodes. This is already possible by other means and it is unlikely a flash will overwrite the (more or less complex) setup function. Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240419141249.609534-4-mwalle@kernel.org
* mtd: spi-nor: get rid of non-power-of-2 page size handlingMichael Walle2024-05-272-34/+11
| | | | | | | | | | | | | The Xilinx flashes were the only users of page sizes that were not power of 2. Support for them has been dropped, thus we can also get rid of the special page size handling for it. Signed-off-by: Michael Walle <mwalle@kernel.org> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> [pratyush@kernel.org: fixup minor typos and grammar in commit message] Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240419141249.609534-3-mwalle@kernel.org
* mtd: spi-nor: Remove support for Xilinx S3AN flashesMichael Walle2024-05-274-172/+0
| | | | | | | | | | | | | | | | These flashes are kind of an oddball for the very old Xilinx Spartan 3 FPGAs to store their bitstream. More importantly, they reuse the Atmel JEDEC manufacturer ID and in fact the at45db081d already blocks the use of the 3S700AN flash chip. It's time to sunset support for these flashes. Signed-off-by: Michael Walle <mwalle@kernel.org> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Cc: Ricardo Ribalda <ribalda@kernel.org> Acked-by: Ricardo Ribalda <ribalda@chromium.org> Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240419141249.609534-2-mwalle@kernel.org
* mtd: spi-nor: replace unnecessary div64_u64() with div_u64()Michael Walle2024-04-291-2/+2
| | | | | | | | | | | | | | Both occurrences of div64_u64() just have a u8 or u32 divisor. Use div_u64() instead. Many 32 bit architectures can optimize this variant better than a full 64 bit divide. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/9ba7f4e6-2b8b-44a3-9cac-9ed6e50f1700@moroto.mountain/ Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> [pratyush@kernel.org: touched up commit message] Signed-off-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20240429121113.803703-1-mwalle@kernel.org
* mtd: spi-nor: core: correct type of iMuhammad Usama Anjum2024-03-131-1/+1
| | | | | | | | | | | | | | | The i should be signed to find out the end of the loop. Otherwise, i >= 0 is always true and loop becomes infinite. Make its type to be int. Fixes: 6a9eda34418f ("mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase map") Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240304090103.818092-1-usama.anjum@collabora.com
* mtd: spi-nor: core: set mtd->eraseregions for non-uniform erase mapTakahiro Kuwano2024-02-261-2/+56
| | | | | | | | | | | | | | | | | Some of Infineon SPI NOR flash devices support hybrid sector layout that overlays 4KB sectors on a 256KB sector and SPI NOR framework recognizes that by parsing SMPT and construct params->erase_map. The hybrid sector layout is similar to CFI flash devices that have small sectors on top and/or bottom address. In case of CFI flash devices, the erase map information is parsed through CFI table and populated into mtd->eraseregions so that users can create MTD partitions that aligned with small sector boundaries. This patch provides the same capability to SPI NOR flash devices that have non-uniform erase map. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/35d0962986e493b06c13bdf7ada8130a9966dc02.1708404584.git.Takahiro.Kuwano@infineon.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
* mtd: spi-nor: core: get rid of SNOR_OVERLAID_REGION flagTakahiro Kuwano2024-02-264-17/+8
| | | | | | | | | | Only SNOR_OVERLAID_REGION is defined for flags in the spi_nor_erase_region structure. It can be replaced by a boolean parameter. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/076416d5dc8328dec72d31db12b9bec96bf0ac66.1708404584.git.Takahiro.Kuwano@infineon.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
* mtd: spi-nor: core: get rid of SNOR_LAST_REGION flagTakahiro Kuwano2024-02-264-105/+41
| | | | | | | | | | | | | | Introduce n_regions in spi_nor_erase_map structure and remove SNOR_LAST_REGION flag. Loop logics that depend on the flag are also reworked to use n_regions as loop condition. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Suggested-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/eded84294bd81e966d6f423e578fc2cfb9a4a5b6.1708404584.git.Takahiro.Kuwano@infineon.com [ta: update spi_nor_init_erase_cmd_list() and break the for loop sooner.] Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
* mtd: spi-nor: core: rework struct spi_nor_erase_regionTakahiro Kuwano2024-02-264-67/+46
| | | | | | | | | | | | | Encoding bitmask flags into offset worsen the code readability. The erase type mask and flags should be stored in dedicated members. Also, erase_map.uniform_erase_type can be removed as it is redundant. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Suggested-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/8e5e9e4081ed9f16ea9dce30693304a4b54d19b1.1708404584.git.Takahiro.Kuwano@infineon.com [ta: remove spi_nor_region_end()] Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
* Merge tag 'mtd/for-6.8' of ↵Linus Torvalds2024-01-0911-119/+227
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "MTD: - Apart from preventing the mtdblk to run on top of ftl or ubiblk (which may cause security issues and has no meaning anyway), there are a few misc fixes. Raw NAND: - Two meaningful changes this time. The conversion of the brcmnand driver to the ->exec_op() API, this series brought additional changes to the core in order to help controller drivers to handle themselves the WP pin during destructive operations when relevant. - There is also a series bringing important fixes to the sequential read feature. - As always, there is as well a whole bunch of miscellaneous W=1 fixes, together with a few runtime fixes (double free, timeout value, OOB layout, missing register initialization) and the usual load of remove callbacks turned into void (which led to switch the txx9ndfmc driver to use module_platform_driver()). SPI NOR: - SPI NOR comes with die erase support for multi die flashes, with new octal protocols (1-1-8 and 1-8-8) parsed from SFDP and with an updated documentation about what the contributors shall consider when proposing flash additions or updates. - Michael Walle stepped out from the reviewer role to maintainer" * tag 'mtd/for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (39 commits) mtd: rawnand: Clarify conditions to enable continuous reads mtd: rawnand: Prevent sequential reads with on-die ECC engines mtd: rawnand: Fix core interference with sequential reads mtd: rawnand: Prevent crossing LUN boundaries during sequential reads mtd: Fix gluebi NULL pointer dereference caused by ftl notifier dt-bindings: mtd: partitions: u-boot: Fix typo mtd: rawnand: s3c2410: fix Excess struct member description kernel-doc warnings MAINTAINERS: change my mail to the kernel.org one mtd: spi-nor: sfdp: get the 1-1-8 and 1-8-8 protocol from SFDP mtd: spi-nor: drop superfluous debug prints mtd: spi-nor: sysfs: hide the flash name if not set mtd: spi-nor: mark the flash name as obsolete mtd: spi-nor: print flash ID instead of name mtd: maps: vmu-flash: Fix the (mtd core) switch to ref counters mtd: ssfdc: Remove an unused variable mtd: rawnand: diskonchip: fix a potential double free in doc_probe mtd: rawnand: rockchip: Add missing title to a kernel doc comment mtd: rawnand: rockchip: Rename a structure mtd: rawnand: pl353: Fix kernel doc mtd: spi-nor: micron-st: Add support for mt25qu01g ...
| * mtd: spi-nor: sfdp: get the 1-1-8 and 1-8-8 protocol from SFDPJaimeLiao2023-12-202-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BFPT 17th DWORD contains the information about 1-1-8 and 1-8-8. Parse BFPT DWORD[17] instruction to determine whether flash supports 1-1-8 and 1-8-8, and set its dummy cycles accordingly. Validated only the 1-1-8 read using a macronix flash with Xilinx board zynq-picozed. Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20231219102103.92738-2-jaimeliao.tw@gmail.com [ta: update commit message, get rid of extra dereference] Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: drop superfluous debug printsTudor Ambarus2023-12-191-18/+0
| | | | | | | | | | | | | | | | | | The mtd data shall be obtained with the mtd ioctls or with new debugfs entries if one cares. Drop the debug prints. Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20231215082138.16063-5-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: sysfs: hide the flash name if not setJaimeLiao2023-12-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | The flash name is not reliable as we saw flash ID collisions. Hide the flash name if not set. Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw> Reviewed-by: Michael Walle <michael@walle.cc> [ta: update commit subject and description and the sysfs description] Link: https://lore.kernel.org/r/20231215082138.16063-4-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: mark the flash name as obsoleteTudor Ambarus2023-12-191-1/+1
| | | | | | | | | | | | | | | | | | The flash name is unreliable as we saw flash ID collisions. Mark the name as obsolete. Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20231215082138.16063-3-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: print flash ID instead of nameTudor Ambarus2023-12-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | We saw flash ID collisions which make the flash name unreliable. Print the manufacturer and device ID instead of the flash name. Lower the print to dev_dbg to stop polluting the kernel log. Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20231215082138.16063-2-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: micron-st: Add support for mt25qu01gFabio Estevam2023-12-061-0/+25
| | | | | | | | | | | | | | | | | | | | | | Add support for the MT25QU01G 128MB Micron Serial NOR Flash Memory model. Link: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_01g_bbb_0.pdf Signed-off-by: Fabio Estevam <festevam@denx.de> [ta: introduce die erase] Link: https://lore.kernel.org/r/20231125123529.55686-6-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: remove NO_CHIP_ERASE flagTudor Ambarus2023-12-062-8/+3
| | | | | | | | | | | | | | | | | | There's no flash using it and we'd like to rely instead on SFDP data, thus remove it. Tested-by: Fabio Estevam <festevam@denx.de> Link: https://lore.kernel.org/r/20231125123529.55686-5-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: micron-st: enable die erase for multi die flashesTudor Ambarus2023-12-062-19/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable die erase for multi die flashes, it will speed the erase time. Unfortunately, Micron does not provide a 4-byte opcode equivalent for the die erase. The SFDP 4BAIT table fails to consider the die erase too, the standard can be improved. Thus we're forced to enter in the 4 byte address mode in order to benefit of the die erase. Tested on n25q00. This flash defines the 4BAIT SFDP table, thus it will use the 4BAIT opcodes for reads, page programs or erases, with the exception that it will use the die erase command in the 4 byte address mode. Link: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_1gb_3v_65nm.pdf?rev=b6eba74759984f749f8c039bc5bc47b7 Link: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_l_02g_cbb_0.pdf?rev=43f7f66fc8da4d7d901b35fa51284c8f Link: https://lore.kernel.org/r/20231125123529.55686-4-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: spansion: enable die erase for multi die flashesTudor Ambarus2023-12-061-2/+2
| | | | | | | | | | | | | | | | Enable die erase for spansion multi die flashes. Tested-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Link: https://lore.kernel.org/r/20231125123529.55686-3-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: add erase die (chip) capabilityTudor Ambarus2023-12-063-37/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | JESD216 mentions die erase, but does not provide an opcode for it. Check BFPT dword 11, bits 30:24, "Chip Erase, Typical time", it says: "Typical time to erase one chip (die). User must poll device busy to determine if the operation has completed. For a device consisting of multiple dies, that are individually accessed, the time is for each die to which a chip erase command is applied." So when a flash consists of a single die, this is the erase time for the full chip (die) erase, and when it consists of multiple dies, it's the die erase time. Chip and die are the same thing. Add support for die erase. For now, benefit of the die erase when addr and len are aligned with die size. This could be improved however for the uniform and non-uniform erases cases to use the die erase when possible. For example if one requests that an erase of a 2 die device starting from the last 64KB of the first die to the end of the flash size, we could use just 2 commands, a 64KB erase and a die erase. This improvement is left as an exercise for the reader. Tested-by: Fabio Estevam <festevam@denx.de> Link: https://lore.kernel.org/r/20231125123529.55686-2-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: use kernel sized types instead of c99 typesTudor Ambarus2023-11-155-31/+27
| | | | | | | | | | | | | | | | The kernel offers and prefers the kernel sized types instead of the c99 types when not in the uapi directory, use them. Link: https://lore.kernel.org/r/20231101145853.524045-2-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
* | mtd: spi-nor: Stop reporting warning message when soft reset is not suportedChia-Lin Kao (AceLan)2023-11-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the software reset command isn't supported, we now stop reporting the warning message to avoid unnecessary warnings and potential confusion. Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Michael Walle <michael@walle.cc> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Pratyush Yadav <pratyush@kernel.org> Signed-off-by: "Chia-Lin Kao (AceLan)" <acelan.kao@canonical.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20231129064311.272422-2-acelan.kao@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPPChia-Lin Kao (AceLan)2023-11-301-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit updates the SPI subsystem, particularly affecting "SPI MEM" drivers and core parts, by replacing the -ENOTSUPP error code with -EOPNOTSUPP. The key motivations for this change are as follows: 1. The spi-nor driver currently uses EOPNOTSUPP, whereas calls to spi-mem might return ENOTSUPP. This update aims to unify the error reporting within the SPI subsystem for clarity and consistency. 2. The use of ENOTSUPP has been flagged by checkpatch as inappropriate, mainly being reserved for NFS-related errors. To align with kernel coding standards and recommendations, this change is being made. 3. By using EOPNOTSUPP, we provide more specific context to the error, indicating that a particular operation is not supported. This helps differentiate from the more generic ENOTSUPP error, allowing drivers to better handle and respond to different error scenarios. Risks and Considerations: While this change is primarily intended as a code cleanup and error code unification, there is a minor risk of breaking user-space applications that rely on specific return codes for unsupported operations. However, this risk is considered low, as such use-cases are unlikely to be common or critical. Nevertheless, developers and users should be aware of this change, especially if they have scripts or tools that specifically handle SPI error codes. This commit does not introduce any functional changes to the SPI subsystem or the affected drivers. Signed-off-by: "Chia-Lin Kao (AceLan)" <acelan.kao@canonical.com> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20231129064311.272422-1-acelan.kao@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge tag 'spi-nor/for-6.7' into mtd/nextMiquel Raynal2023-11-0421-873/+1407
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For SPI NOR we cleaned the flash info entries in order to have them slimmer and self explanatory. In order to make the entries as slim as possible, we introduced sane default values so that the actual flash entries don't need to specify them. We now use a flexible macro to specify the flash ID instead of the previous INFOx() macros that had hardcoded ID lengths. Instead of: - { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) - OTP_INFO(256, 3, 0x1000, 0x1000) }, We now use: + .id = SNOR_ID(0xef, 0x80, 0x20), + .name = "w25q512nwm", + .otp = SNOR_OTP(256, 3, 0x1000, 0x1000), We also removed some flash entries: the very old Catalyst SPI EEPROMs that were introduced once with the SPI-NOR subsystem, and a Fujitsu MRAM. Both should use the at25 EEPROM driver. The latter even has device tree bindings for the at25 driver. We made sure that the conversion didn't introduce any unwanted changes by comparing the .rodata segment before and after the conversion. The patches landed in linux-next immediately after v6.6-rc2, we haven't seen any regressions yet. Apart of the autumn cleaning we introduced a new flash entry, at25ff321a, and added block protection support for mt25qu512a. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| * mtd: spi-nor: micron-st: use SFDP table for mt25qu512aMamta Shukla2023-10-181-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Parse SFDP table to get size and functions of mt25qu512a. BFPT wrongly advertises 16bit SR support and made the locking fail. Add a post BFPT fixup hook to clear the 16bit SR support. cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/jedec_id 20bb20104400 cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/manufacturer st cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/partname mt25qu512a xxd -p /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp 53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff1f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03e1ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff md5sum /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp 610efba1647e00ac6db18beb11e84c04 /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Link: https://lore.kernel.org/r/20231017074711.12167-2-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: micron-st: enable lock/unlock for mt25qu512aMamta Shukla2023-10-181-0/+2
| | | | | | | | | | | | | | | | | | | | mt25qu512a supports locking/unlocking through the SR BP bits. Enable locking support. Tested with mtd-utils- flash_lock/flash_unlock on MT25QU512ABB8E12. Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com> Link: https://lore.kernel.org/r/20231017074711.12167-1-tudor.ambarus@linaro.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: atmel: add at25ff321a entryNicolas Ferre2023-09-271-0/+5
| | | | | | | | | | | | | | | | | | | | Add the at25ff321a 4MB SPI flash which is able to provide SFDP information. Link: https://www.renesas.com/us/en/document/dst/at25ff321a-datasheet Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230926131655.51224-1-nicolas.ferre@microchip.com Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: core: get rid of the INFOx() macrosMichael Walle2023-09-191-65/+0
| | | | | | | | | | | | | | | | | | Now that all flash_info tables are converted to the new format, remove the old INFOx() macros. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-41-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: atmel: drop duplicate entryMichael Walle2023-09-191-7/+0
| | | | | | | | | | | | | | | | | | | | | | The Atmel AT26DF321 and AT25DF321 have the same ID. Both were just discovered by reading their IDs, that is, there is no probing by name. Thus only the first one (the AT25DF321) in the list was ever probed. Luckily, the AT25DF is also the newer series. Drop the AT26DF321. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-40-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: winbond: sort flash_info entriesMichael Walle2023-09-191-83/+83
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-39-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: sst: sort flash_info databaseMichael Walle2023-09-191-45/+45
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-38-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: spansion: sort flash_info databaseMichael Walle2023-09-191-87/+87
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-37-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: micron-st: sort flash_info databaseMichael Walle2023-09-191-168/+168
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-36-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: macronix: sort flash_info databaseMichael Walle2023-09-191-65/+65
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-35-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: issi: sort flash_info databaseMichael Walle2023-09-191-22/+22
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-34-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: gigadevice: sort flash_info databaseMichael Walle2023-09-191-18/+18
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-33-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: eon: sort flash_info databaseMichael Walle2023-09-191-18/+18
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-32-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: atmel: sort flash_info databaseMichael Walle2023-09-191-41/+41
| | | | | | | | | | | | | | | | | | | | The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-31-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: xmc: convert flash_info to new formatMichael Walle2023-09-191-6/+11
| | | | | | | | | | | | | | | | | | The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-30-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: xilinx: use new macros in S3AN_INFO()Michael Walle2023-09-191-11/+12
| | | | | | | | | | | | | | | | | | | | There won't be any new entries, nor are the entries that much different and the very odd page and sector sizes make the new format hard to read. Therefore, convert the old S3AN_INFO() macro. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-29-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: winbond: convert flash_info to new formatMichael Walle2023-09-191-96/+185
| | | | | | | | | | | | | | | | | | The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-28-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
| * mtd: spi-nor: sst: convert flash_info to new formatMichael Walle2023-09-191-58/+104
| | | | | | | | | | | | | | | | | | The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-27-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
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