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* Merge tag 'pinctrl-v5.14-1' of ↵Linus Torvalds2021-07-0162-283/+6315
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.14 kernel. Not so much going on. No core changes, just drivers. The most interesting would be that MIPS Ralink is migrating to pin control and we have some bindings but not yet code for the Apple M1 pin controller. New drivers: - Last merge window we created a driver for the Ralink RT2880. We are now moving the Ralink SoC pin control drivers out of the MIPS architecture code and into the pin control subsystem. This concerns RT288X, MT7620, RT305X, RT3883 and MT7621. - Qualcomm SM6125 SoC pin control driver. - Qualcomm spmi-gpio support for PM7325. - Qualcomm spmi-mpp also handles PMI8994 (just a compatible string) - Mediatek MT8365 SoC pin controller. - New device HID for the AMD GPIO controller. Improvements: - Pin bias config support for a slew of Renesas pin controllers. - Incremental improvements and non-urgent bug fixes to the Renesas SoC drivers. - Implement irq_set_wake on the AMD pin controller so we can wake up from external pin events. Misc: - Devicetree bindings for the Apple M1 pin controller, we will probably see a proper driver for this soon as well" * tag 'pinctrl-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (54 commits) pinctrl: ralink: rt305x: add missing include pinctrl: stm32: check for IRQ MUX validity during alloc() pinctrl: zynqmp: some code cleanups drivers: qcom: pinctrl: Add pinctrl driver for sm6125 dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driver dt-bindings: pinctrl: mcp23s08: add documentation for reset-gpios pinctrl: mcp23s08: Add optional reset GPIO pinctrl: mediatek: fix mode encoding pinctrl: mcp23s08: Fix missing unlock on error in mcp23s08_irq() pinctrl: bcm: Constify static pinmux_ops pinctrl: bcm: Constify static pinctrl_ops pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' file pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file pinctrl: ralink: move RT3883 SoC pinmux config into a new 'pinctrl-rt3883.c' file pinctrl: ralink: move MT7621 SoC pinmux config into a new 'pinctrl-mt7621.c' file pinctrl: ralink: move ralink architecture pinmux header into the driver pinctrl: single: config: enable the pin's input pinctrl: mtk: Fix mt8365 Kconfig dependency pinctrl: mcp23s08: fix race condition in irq handler ...
| * pinctrl: ralink: rt305x: add missing includeSergio Paracuellos2021-06-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Header 'rt305x.h' is ralink architecture dependent file where other general definitions which are in 'ralink_regs.h' are being used. This 'rt305x.h' is only being included in two different files: 'rt305x.c' and 'pinctrl-rt305x.c'. When file 'pinctrl-rt305x.c' is being compiled definitions in 'ralink_regs.h' are need to build it properly. Hence, add missing include 'ralink_regs.h' in 'pinctrl-rt305x.c' source to avoid compilation problems. Fixes: 3a1b0ca5a83b ("pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210629143407.14703-1-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: stm32: check for IRQ MUX validity during alloc()Fabien Dessenne2021-06-261-39/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Considering the following irq_domain_ops call chain: - .alloc() is called when a clients calls platform_get_irq() or gpiod_to_irq() - .activate() is called next, when the clients calls request_threaded_irq() Check for the IRQ MUX conflict during the first stage (alloc instead of activate). This avoids to provide the client with an IRQ that can't be used. Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20210617144602.2557619-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: zynqmp: some code cleanupsSai Krishna Potthuri2021-06-262-30/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Some minor code cleanups and updates which includes - Mention module name under help in Kconfig. - Remove extra lines and duplicate Pin range checks. - Replace 'return ret' with 'return 0' in success path. - Copyright year update. - use devm_pinctrl_register() instead pinctrl_register() in probe. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Link: https://lore.kernel.org/r/1624273214-66849-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers: qcom: pinctrl: Add pinctrl driver for sm6125Martin Botka2021-06-183-0/+1287
| | | | | | | | | | | | | | | | | | This patch adds pinctrl driver for sm6125. Signed-off-by: Martin Botka <martin.botka@somainline.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210614172713.558192-2-martin.botka@somainline.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge tag 'renesas-pinctrl-for-v5.14-tag2' of ↵Linus Walleij2021-06-126-80/+1844
| |\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.14 (take two) - Add bias support for the R-Car H2, V2H, E2, V3M, and V3H, and RZ/G1C, RZ/G1H, and RZ/G1E SoCs.
| | * pinctrl: renesas: r8a77980: Add bias pinconf supportGeert Uytterhoeven2021-05-311-6/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up and pull-down handling for the R-Car V3H SoC, using the common R-Car bias handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/448f47ccd89d9bc8621c7fda8c81508deb05cb82.1619785375.git.geert+renesas@glider.be
| | * pinctrl: renesas: r8a77970: Add bias pinconf supportGeert Uytterhoeven2021-05-311-6/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins, excl. DU_DOTCLKIN and EXTALR) and pull-down (most pins, excl. JTAG) handling for the R-Car V3M SoC, using the common R-Car bias handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/bcfad447624d874258a45a92554574b8fe9f712f.1619785375.git.geert+renesas@glider.be
| | * pinctrl: renesas: r8a7794: Add bias pinconf supportGeert Uytterhoeven2021-05-311-9/+351
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK) handling for R-Car E2 and RZ/G1E SoCs, using the common R-Car bias handling. Note that on RZ/G1E, the "ASEBRK#/ACK" pin is called "ACK", but the code doesn't handle that naming difference. Hence users should use the R-Car naming in DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/f78da2ba937ce98ae9196f4ee54149a5214fd545.1619785375.git.geert+renesas@glider.be
| | * pinctrl: renesas: r8a7792: Add bias pinconf supportGeert Uytterhoeven2021-05-311-12/+521
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins) and pull-down (EDBGREQ) handling for the R-Car V2H SoC, using the common R-Car bias handling. Note that the R-Car V2H Hardware User's Manual Rev. 1.00 says that the LSI Pin Pull-Up Control Register 11 (PUPR11) controls pull-ups for the {SCK,WS,SDATA}[01] pins. These are assumed to be typos, as R-Car V2H has only Serial Sound Interface channels 3 and 4. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/48d2abdd63ee43ed99cb32ed4a5f4d76ba563162.1619785375.git.geert+renesas@glider.be
| | * pinctrl: renesas: r8a7790: Add bias pinconf supportGeert Uytterhoeven2021-05-311-7/+294
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK) handling for R-Car H2 and RZ/G1H SoCs, using the common R-Car bias handling. Note that on RZ/G1H, the "ASEBRK#/ACK" pin is called "ACK", but the code doesn't handle that naming difference. Hence users should use the R-Car naming in DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/dde6e0b36a4e4494039a3466df208b5ec5c594ee.1619785375.git.geert+renesas@glider.be
| | * pinctrl: renesas: r8a77470: Add bias pinconf supportGeert Uytterhoeven2021-05-311-40/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK) handling for the RZ/G1C SoC, using the common R-Car bias handling. Note that on RZ/G1C, the "ASEBRK#/ACK" pin is called "ACK", but the code doesn't handle that naming difference. Hence users should use the R-Car naming in DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/18c8ebf9fa9e239253a723857e9dffeec775db7e.1619785375.git.geert+renesas@glider.be
| * | pinctrl: mcp23s08: Add optional reset GPIOAndreas Kaessens2021-06-122-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MCP23x port expander RESET# line can be connected to a host GPIO. The optional reset-gpio must be set to LOW if the reset is asserted at probing time. On page 5 in the datasheet [0] the "Device Active After Reset high" time is specified at 0 µs. Therefore no waiting is needed after the reset transition. [0] https://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf Signed-off-by: Andreas Kaessens <akaessens@gmail.com> Signed-off-by: Darian Biastoch <d.biastoch@gmail.com> Link: https://lore.kernel.org/r/20210610132438.3085841-1-akaessens@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge tag 'intel-pinctrl-v5.14-1' of ↵Linus Walleij2021-06-091-0/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.14-1 * Enabling pin controller on Intel Alder Lake-M The following is an automated git shortlog grouped by driver: tigerlake: - Add Alder Lake-M ACPI ID
| | * | pinctrl: tigerlake: Add Alder Lake-M ACPI IDAndy Shevchenko2021-05-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Alder Lake-M PCH has the same GPIO hardware than Tiger Lake-LP PCH but the ACPI ID is different. Add this new ACPI ID to the list of supported devices. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * | | pinctrl: mediatek: fix mode encodingMatthias Brugger2021-06-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pin modes are encoded in the SoC data structure. Use that value to set IES SMT. Cc: Fabien Parent <fparent@baylibre.com> Cc: Sean Wang <sean.wang@kernel.org> Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com> Cc: linux-mediatek@lists.infradead.org Fixes: 696beef77521 ("pinctrl: mediatek: move bit assignment") Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com> Link: https://lore.kernel.org/r/20210608150656.29007-1-matthias.bgg@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: mcp23s08: Fix missing unlock on error in mcp23s08_irq()Zou Wei2021-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing unlock before return from function mcp23s08_irq() in the error handling case. v1-->v2: remove the "return IRQ_HANDLED" line Fixes: 897120d41e7a ("pinctrl: mcp23s08: fix race condition in irq handler") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Link: https://lore.kernel.org/r/1623134048-56051-1-git-send-email-zou_wei@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: bcm: Constify static pinmux_opsRikard Falkeborn2021-06-097-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are only assigned, either directly or via the bcm63xx_pinctrl_soc struct, to the pmxops field in the pinctrl_desc struct and never modified, so make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210605185908.39982-3-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: bcm: Constify static pinctrl_opsRikard Falkeborn2021-06-097-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are only assigned, either directly or via the bcm63xx_pinctrl_soc struct, to the pctlops field in the pinctrl_desc struct and never modified, so make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210605185908.39982-2-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' ↵Sergio Paracuellos2021-06-073-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | file Move all related code for SoC RT288X into a new driver located in 'pinctrl-rt288x.c' source file. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-7-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' ↵Sergio Paracuellos2021-06-073-0/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | file Move all related code for SoC MT7620 into a new driver located in 'pinctrl-mt7620.c' source file. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-6-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' ↵Sergio Paracuellos2021-06-073-0/+142
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | file Move all related code for SoC RT305X into a new driver located in 'pinctrl-rt305x.c' source file. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-5-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ralink: move RT3883 SoC pinmux config into a new 'pinctrl-rt3883.c' ↵Sergio Paracuellos2021-06-073-0/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | file Move all related code for SoC RT3883 into a new driver located in 'pinctrl-rt3883.c' source file Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-4-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ralink: move MT7621 SoC pinmux config into a new 'pinctrl-mt7621.c' ↵Sergio Paracuellos2021-06-073-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | file Move all related code for SoC MT7621 into a new driver located in 'pinctrl-mt7621.c' source file. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-3-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ralink: move ralink architecture pinmux header into the driverSergio Paracuellos2021-06-072-25/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ralink architecture is making use of the header located in 'arch/mips/include/asm/mach-ralink/pinmux.h' to stablish the mechanisms to make derived SoCs to set its pin functions and groups. In order to move all architecture pinmux into a more accurate place which is 'drivers/pinctrl/ralink' we have to first of all move this file also there with a small modification which creates 'rt2880_pinmux_init' function to allow SoCs pinctrl drivers to pass its configuration to the common code located in 'pinctrl-rt2880.c' file. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-2-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: single: config: enable the pin's inputDario Binacchi2021-06-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It enables / disables the input buffer. As explained in the description of 'enum pin_config_param' this does not affect the pin's ability to drive output. Signed-off-by: Dario Binacchi <dariobin@libero.it> Acked-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20210602150420.18202-1-dariobin@libero.it Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: mtk: Fix mt8365 Kconfig dependencyLinus Walleij2021-06-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This SoC needs to select PINCTRL_MTK or we can end up in kernel compiles that miss some symbols. Cc: Fabien Parent <fparent@baylibre.com> Reported-by: kernel test robot <lkp@intel.com> Fixes: e94d8b6fb83a ("pinctrl: mediatek: add support for mt8365 SoC") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: mcp23s08: fix race condition in irq handlerRadim Pavlik2021-06-071-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checking value of MCP_INTF in mcp23s08_irq suggests that the handler may be called even when there is no interrupt pending. But the actual interrupt could happened between reading MCP_INTF and MCP_GPIO. In this situation we got nothing from MCP_INTF, but the event gets acknowledged on the expander by reading MCP_GPIO. This leads to losing events. Fix the problem by not reading any register until we see something in MCP_INTF. The error was reproduced and fix tested on MCP23017. Signed-off-by: Radim Pavlik <radim.pavlik@tbs-biometrics.com> Link: https://lore.kernel.org/r/AM7PR06MB6769E1183F68DEBB252F665ABA3E9@AM7PR06MB6769.eurprd06.prod.outlook.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | Merge tag 'renesas-pinctrl-for-v5.14-tag1' of ↵Linus Walleij2021-05-285-56/+56
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.14 - Minor fixes and improvements.
| | * | pinctrl: renesas: r8a779{51,6,65}: Reduce non-functional differencesGeert Uytterhoeven2021-05-113-44/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change whitespace in the pin control drivers for R-Car H3 ES2.0+, R-Car M3-W/M3-W+, and R-Car M3-N, to reduce the differences among these very similar drivers. These changes have no functional impact. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/527b45ebfc664a80e41cb0136677db7260e11437.1619785375.git.geert+renesas@glider.be
| | * | pinctrl: renesas: r8a7778: Remove unused PORT_GP_PUP_1() macroGeert Uytterhoeven2021-05-111-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last user was removed in commit dd1f760bffcee2c5 ("pinctrl: sh-pfc: r8a7778: Use common PORT_GP_CFG_27() macro"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/129147ac57f5e931cc7108db0a6483b803a1b8f4.1619785375.git.geert+renesas@glider.be
| | * | pinctrl: renesas: r8a77990: Drop bogus PUEN_ prefixes in commentsGeert Uytterhoeven2021-05-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "PUEN_" prefixes are part of the bit names of the PUEN registers, while the comments should refer to the actual pin names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/9ea85ae8973f6d9b3d10f02f0d9b4ab6a086ec63.1619785375.git.geert+renesas@glider.be
| | * | pinctrl: renesas: r8a77990: JTAG pins do not have pull-down capabilitiesGeert Uytterhoeven2021-05-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hence remove the SH_PFC_PIN_CFG_PULL_DOWN flags from their pin descriptions. Fixes: 83f6941a42a5e773 ("pinctrl: sh-pfc: r8a77990: Add bias pinconf support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/da4b2d69955840a506412f1e8099607a0da97ecc.1619785375.git.geert+renesas@glider.be
| | * | pinctrl: renesas: r8a7796: Add missing bias for PRESET# pinGeert Uytterhoeven2021-05-111-1/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R-Car Gen3 Hardware Manual Errata for Rev. 0.52 of Nov 30, 2016, added the configuration bit for bias pull-down control for the PRESET# pin on R-Car M3-W. Add driver support for controlling pull-down on this pin. Fixes: 2d40bd24274d2577 ("pinctrl: sh-pfc: r8a7796: Add bias pinconf support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/c479de5b3f235c2f7d5faea9e7e08e6fccb135df.1619785375.git.geert+renesas@glider.be
| * | pinctrl: mediatek: move bit assignmentLinus Walleij2021-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bit needs offset to be defined which happens some lines below. Looks like a bug. The kernel test robot complains: drivers/pinctrl/mediatek/pinctrl-mtk-common.c:137:12: warning: variable 'offset' is uninitialized when used here [-Wuninitialized] bit = BIT(offset & pctl->devdata->mode_mask); ^~~~~~ Fix it up by reverting to what was done before. Cc: Fabien Parent <fparent@baylibre.com> Cc: Sean Wang <sean.wang@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com> Cc: linux-mediatek@lists.infradead.org Fixes: 9f940d8ecf92 ("pinctrl: mediatek: don't hardcode mode encoding in common code") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: bcm2835: Accept fewer than expected IRQsPhil Elwell2021-05-281-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The downstream .dts files only request two GPIO IRQs. Truncate the array of parent IRQs when irq_of_parse_and_map returns 0. Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210521090158.26932-1-iivanov@suse.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: Fix kernel-docYang Li2021-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix function name in pinctrl-single.c kernel-doc comment to remove a warning found by clang_w1. drivers/pinctrl/pinctrl-single.c:1523: warning: expecting prototype for pcs_irq_handle(). Prototype was for pcs_irq_chain_handler() instead. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1621998464-10918-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: pinctrl-aspeed-g6: Add sgpio pinctrl settingsSteven Lee2021-05-282-4/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 supports 2 SGPIO master interfaces and 2 SGPIO slave interfaces. Current pinctrl driver only define the first sgpio master and slave interfaces. The second SGPIO master and slave interfaces should be added in pinctrl driver as well. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210525055308.31069-4-steven_lee@aspeedtech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mediatek: add support for mt8365 SoCFabien Parent2021-05-274-0/+2020
| | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl driver for MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20210519162409.3755679-3-fparent@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mediatek: don't hardcode mode encoding in common codeFabien Parent2021-05-2710-10/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MT8365 encode the pins mode differently than other MTK pinctrl drivers that use the PINCTRL_MTK common code. Add 3 new fields in mtk_pinctrl_devdata in order to store how pin modes are encoded into the register. At the same time update all the pinctrl driver that depends on CONFIG_PINCTRL_MTK. Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20210519162409.3755679-2-fparent@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: at91: Constify struct at91_pinctrl_mux_opsRikard Falkeborn2021-05-251-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The at91_pinctrl_mux_ops struct is never modified by the driver. Make it const wherever it is possible to allow the compiler to put the static variables in read-only memory. Note that sam9x60_ops was already const, but the const was cast away when the return value of of_match_device() was cast to a pointer to a non-const struct at91_pinctrl_mux_ops. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20210512180140.33293-1-rikard.falkeborn@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: npcm: Align a few entries in the pin function tableJonathan Neuschäfer2021-05-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The entries for GPIO 33 and 34 are not properly aligned. Fix the alignment. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20210513160947.1716185-1-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl/amd: Add device HID for new AMD GPIO controllerMaximilian Luz2021-05-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device HID AMDI0031 to the AMD GPIO controller driver match table. This controller can be found on Microsoft Surface Laptop 4 devices and seems similar enough that we can just copy the existing AMDI0030 entry. Cc: <stable@vger.kernel.org> # 5.10+ Tested-by: Sachi King <nakato@nakato.io> Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com> Link: https://lore.kernel.org/r/20210512210316.1982416-1-luzmaximilian@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: qcom: spmi-gpio: Add support for pm7325satya priya2021-05-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add compatible string for PM7325 pmic GPIO support to the Qualcomm PMIC GPIO driver. Signed-off-by: satya priya <skakit@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1620817988-18809-2-git-send-email-skakit@codeaurora.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: iproc-gpio: Remove redundant error printing in iproc_gpio_probe()Zhen Lei2021-05-201-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When devm_ioremap_resource() fails, a clear enough error message will be printed by its subfunction __devm_ioremap_resource(). The error information contains the device name, failure cause, and possibly resource information. Therefore, remove the error printing here to simplify code and reduce the binary size. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Link: https://lore.kernel.org/r/20210511085126.4287-1-thunder.leizhen@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: ocelot: Remove redundant error printing in ocelot_pinctrl_probe()Zhen Lei2021-05-201-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When devm_ioremap_resource() fails, a clear enough error message will be printed by its subfunction __devm_ioremap_resource(). The error information contains the device name, failure cause, and possibly resource information. Therefore, remove the error printing here to simplify code and reduce the binary size. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20210511090936.4452-1-thunder.leizhen@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: equilibrium: Add missing MODULE_DEVICE_TABLEBixuan Cui2021-05-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Bixuan Cui <cuibixuan@huawei.com> Link: https://lore.kernel.org/r/20210508031502.53637-1-cuibixuan@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: qcom: spmi-mpp: Add compatible for pmi8994Bjorn Andersson2021-05-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMI8994 has 4 multi-purpose-pins, add a compatible for this hardware block to the MPP driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210429003751.224232-1-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: amd: Implement irq_set_wakeRaul E Rangel2021-05-191-1/+31
| |/ | | | | | | | | | | | | | | | | | | | | This allows the OS to control which devices produce wake events. $ grep enabled /sys/kernel/irq/*/wakeup /sys/kernel/irq/24/wakeup:enabled Signed-off-by: Raul E Rangel <rrangel@chromium.org> Link: https://lore.kernel.org/r/20210429163341.1.I7631534622233689dd81410525e0dd617b9b2012@changeid Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: stm32: fix the reported number of GPIO lines per bankFabien Dessenne2021-06-181-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Each GPIO bank supports a variable number of lines which is usually 16, but is less in some cases : this is specified by the last argument of the "gpio-ranges" bank node property. Report to the framework, the actual number of lines, so the libgpiod gpioinfo command lists the actually existing GPIO lines. Fixes: 1dc9d289154b ("pinctrl: stm32: add possibility to use gpio-ranges to declare bank range") Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20210617144629.2557693-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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