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* pinctrl: samsung and exynos need to depend on OF && GPIOLIBAxel Lin2012-11-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes below build error when !CONFIG_OF_GPIO. CC drivers/pinctrl/pinctrl-samsung.o drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins': drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable] drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register': drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node' make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 The samsung pinctrl driver supports only device tree enabled platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB. The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available when GPIOLIB is selected. Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make PINCTRL_EXYNOS4 depend on OF && GPIOLIB. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr1340: Add clcd sleep mode pin configurationVipul Kumar Samar2012-11-051-1/+38
| | | | | | | | | CLCD pads must be configured differently for sleep mode. This patch adds support for clcd_sleep_pingroup. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr1340: Make DDR reset & clock pads as gpioDeepak Sikri2012-11-051-1/+1
| | | | | | | | | | Some gpio pins are used to control DDR reset and clock enable while the system is moved into Low power. This patch adds in the corresponding GPIO entries in the pads_as_gpio_pins to ensure the pads are available as gpio's. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr1310: add register entries for enabling pad directionShiraz Hashim2012-11-051-0/+266
| | | | | | | | | Pad direction must also be updated for SPEAr1310, while setting pads values. This patch adds support for that. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr1310: Separate out pci pins from pcie_sata pin groupVipul Kumar Samar2012-11-051-42/+51
| | | | | | | | | | | | | | SPEAr1310 has separate PCI and PCIe implementations which are not muxed with each other. Presently they have been implemented as muxed together with SATA and are represented wrongly in the software. In reality only PCIe and SATA implementations are muxed with each other. This patch separates out pci pins creating a new pingroup and function for pci. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr1310: Fix value of PERIP_CFG reigster and MCIF_SEL_SHIFTVipul Kumar Samar2012-11-051-2/+2
| | | | | | | | | This patch fixes two macros: PERIP_CFG registers offset and MCIF selection shift. Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr1310: fix clcd high resolution pin group nameShiraz Hashim2012-11-051-1/+1
| | | | | | | | | All group names in SPEAr pinctrl have "_grp" at the end of their name. Do the same for clcd_high_res_grp. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr320: Correct pad mux entries for rmii/smiiDeepak Sikri2012-11-051-2/+2
| | | | | | | | pin entries of rmii and smii are interchanged by mistake. Fix it. Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr3xx: correct register space to configure pwmShiraz Hashim2012-11-052-0/+5
| | | | | | | | | | To have pwm on pad no. 34 we also need to select between pwm and SD_LED functions. Add this to pwm pin mux register configuration. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: SPEAr: Don't update all non muxreg bits on pinctrl_disableViresh Kumar2012-11-051-1/+1
| | | | | | | | | Not all bits of a register are used for pinctrl in SPEAr. So only update bits relevant to pinctrl using muxreg->mask. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: pass DT node to the irqdomainLinus Walleij2012-10-231-1/+1
| | | | | | | | | When creating the simple irqdomain, pass the DT node pointer along, as is apropriate. Acked-by: Lee Jones <lee.jones@linaro.org> Reported-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: use zero as default irq_startLinus Walleij2012-10-231-1/+1
| | | | | | | | | | | | | The irqdomain semantics were supposed to be such that a linear domain would be used if the passed first_irq was zero or negative, but I got it wrong so only passing zero as first_irq will work properly. Well, zero is NO_IRQ these days so let's pass zero. The semantics of irqdomain_add_simple() will be fixed in a separate patch. Acked-by: Lee Jones <lee.jones@linaro.org> Reported-by: Rikard Olsson <rikard.p.olsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: fix missing unlock on error in pinctrl_groups_show()Wei Yongjun2012-10-231-1/+3
| | | | | | | | | Add the missing unlock on the error handle path in function pinctrl_groups_show(). Cc: stable@kernel.org Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: use irq_create_mapping()Linus Walleij2012-10-231-1/+1
| | | | | | | | | | | | | | | | | Since in the DT case, the linear domain path will not allocate descriptors for the IRQs, we need to use irq_create_mapping() for mapping hwirqs to Linux IRQs, so these descriptors get created on-the-fly in this case. ChangeLog v1->v2: - Just use irq_create_mapping() in the .to_irq function since this is called before unmasking or enabling any interrupt lines, so irq_find_mapping() should be sufficient for the IRQ handler function. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: remove mutex lock in groups showHaojian Zhuang2012-10-181-4/+0
| | | | | | | | | | Mutex is locked duplicatly by pinconf_groups_show() and pin_config_group_get(). It results dead lock. So avoid to lock mutex in pinconf_groups_show(). Cc: stable@kernel.org Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: correct bank for pingroup and drv pingroupPritesh Raithatha2012-10-171-12/+12
| | | | | | | | Cc: stable@kernel.org Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: set low power mode bank width to 2Pritesh Raithatha2012-10-171-1/+1
| | | | | | | | Cc: stable@kernel.org Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: always use the simple irqdomainLinus Walleij2012-10-151-10/+3
| | | | | | | | | | Since the simple irqdomain will fall back to a linear domain if the first_irq provided is <= 0, just use this, just make sure the first_irq is negative in the device tree case. Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: provide stubs for legacy NomadikLinus Walleij2012-10-151-0/+13
| | | | | | | | | | | | | | | | The compilation of the pinctrl driver failed on the legacy Nomadik NHK8815 platform because it was not providing the PRCMU interfaces needed to support the extended alternate functions used by the ux500 series. Solve this by providing some stubs for the legacy platform, to avoid too much #ifdefs in the code per se. Theoretically this actually allows the Nomadik and Ux500 to have a single kernel image with support for the PRCM registers on the Ux500 (though they have incompatible archs, but the spirit is there). Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: remove duplicated include from pinctrl-xway.cWei Yongjun2012-10-151-2/+0
| | | | | | | | | | Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sirf: remove sirfsoc_gpio_set_pull functionArnd Bergmann2012-10-151-35/+0
| | | | | | | | | | | | | | | | | | | | | | | | The prima2 platform advertises needing no mach/gpio.h header file, but its pinctrl driver now has a sirfsoc_gpio_set_pull function that uses constants defined in arch/arm/mach-prima2/include/mach/gpio.h, which fails to build. Fortunately, the sirfsoc_gpio_set_pull is not used anywhere in the kernel, so we can safely remove it. Any out of tree drivers using it will have to be converted to use proper pinctrl functions to do the same. Without this patch, building prima2_defconfig results in: drivers/pinctrl/pinctrl-sirf.c: In function 'sirfsoc_gpio_set_pull': drivers/pinctrl/pinctrl-sirf.c:1331:7: error: 'SIRFSOC_GPIO_PULL_NONE' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1331:7: note: each undeclared identifier is reported only once for each function it appears in drivers/pinctrl/pinctrl-sirf.c:1334:7: error: 'SIRFSOC_GPIO_PULL_UP' undeclared (first use in this function) drivers/pinctrl/pinctrl-sirf.c:1338:7: error: 'SIRFSOC_GPIO_PULL_DOWN' undeclared (first use in this function) Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: fix return value in bcm2835_pinctrl_probe()Wei Yongjun2012-10-151-1/+1
| | | | | | | | | | | | | In case of error, the function pinctrl_register() returns NULL not ERR_PTR(). The PTR_ERR() in the return value should be replaced with error no. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: remove duplicated include from pinctrl-bcm2835.cWei Yongjun2012-10-151-1/+0
| | | | | | | | | | | Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: bcm2835: Use existing pointer to struct deviceTobias Klauser2012-10-151-1/+1
| | | | | | | | | The pointer to "pdev->dev" is already stored in "dev", so use it in devm_request_and_ioremap(). Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: samsung: use __devinit section for init codeArnd Bergmann2012-10-151-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | The samsung pinctrl driver has a probe function that is __devinit and that calls a lot of other functions that are marked __init, which kbuild complains about. Marking everything __devinit means that the code does not discarded when CONFIG_HOTPLUG is set, which is a little more wasteful, but also more consistent Without this patch, building exynos_defconfig results in: WARNING: drivers/pinctrl/built-in.o(.devinit.text+0x124): Section mismatch in reference from the function samsung_pinctrl_probe() to the function .init.text:samsung_gpiolib_register() The function __devinit samsung_pinctrl_probe() references a function __init samsung_gpiolib_register(). If samsung_gpiolib_register is only used by samsung_pinctrl_probe then annotate samsung_gpiolib_register with a matching annotation. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@nvidia.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: use simple or linear IRQ domainLinus Walleij2012-10-101-3/+13
| | | | | | | | | | | | | | This alters the Nomadik pinctrl driver to: - Call irqdomain_add_linear() for the DT case so we get all independent from IRQ numbers in this case. - Call irqdomain_add_simple() for the legacy case, which allocates the IRQ descriptors for the Nomadik pin controller dynamically. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: support other alternate-C functionsJean-Nicolas Graux2012-10-104-47/+765
| | | | | | | | | | | | | | | | | Upgrade nomadik pinctrl driver to enable selection of other alternate-C[1-4] functions on some specific ux500 SoC pins. Handling of those functions is done thanks to PRCM GPIOCR registers. This was previously managed in PRCMU driver and it was not really convenient. Idea is to provide a common way to control all alternate functions. Note that this improvement does not support the old-fashioned way used to control nomadik pins, namely the "nmk_config_pin()" function and its derivatives. Signed-off-by: Jean-Nicolas Graux <jean-nicolas.graux@stericsson.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-10-096-0/+1804
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS update from Ralf Baechle: "This is the MIPS update for 3.7. A fair chunk of them are platform updates to the Cavium Octeon SOC (which involves machine generated header files of considerable size), Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx platforms. Support for the commercial MIPS simulator MIPSsim has been removed as MIPS Technologies is shifting away from this product and Qemu is offering various more powerful platforms. The generic MIPS code can now also probe for no-execute / write-only TLB features implemented without the full SmartMIPS extension as permitted by the latest MIPS processor architecture. Lots of small changes to generic code." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits) MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x MIPS: BCM63XX: Properly handle mac address octet overflow MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user. MIPS: Replace `-' in defconfig filename wth `_' for consistency. MIPS: Wire kcmp syscall. MIPS: MIPSsim: Remove the MIPSsim platform. MIPS: NOTIFY_RESUME is not needed in TIF masks MIPS: Merge the identical "return from syscall" per-ABI code MIPS: Unobfuscate _TIF..._MASK MIPS: Prevent hitting do_notify_resume() with !user_mode(regs). MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'. MIPS: Add base architecture support for RI and XI. MIPS: Optimise TLB handlers for MIPS32/64 R2 cores. MIPS: uasm: Add INS and EXT instructions. MIPS: Avoid pipeline stalls on some MIPS32R2 cores. MIPS: Make VPE count to be one-based. MIPS: Add new end of interrupt functionality for GIC. MIPS: Add EIC support for GIC. MIPS: Code clean-ups for the GIC. ...
| * OF: pinctrl: MIPS: lantiq: adds support for FALCON SoCJohn Crispin2012-09-133-0/+474
| | | | | | | | | | | | | | | | | | | | | | Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks of up to 32 pins. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
| * OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl supportJohn Crispin2012-09-135-0/+1330
| | | | | | | | | | | | | | | | | | | | | | | | | | Implement support for pinctrl on lantiq/xway socs. The IO core found on these socs has the registers for pinctrl, pinconf and gpio mixed up in the same register range. As the gpio_chip handling is only a few lines, the driver also implements the gpio functionality. This obseletes the old gpio driver that was located in the arch/ folder. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org
* | Merge tag 'soc-late' of ↵Linus Torvalds2012-10-078-0/+2954
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull late ARM soc platform updates from Olof Johansson: "This branch contains updates to OMAP and Marvell platforms (kirkwood, dove, mvebu) that came in after we had done the big multiplatform merges, so they were kept separate from the rest, and not separated into the traditional topics of cleanup/driver/platform features. For OMAP, the updates are: - Runtime PM conversions for the GPMC and RNG IP blocks - Preparation patches for the OMAP common clock framework conversion - clkdev alias additions required by other drivers - Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4 - OMAP hwmod code and data improvements - Preparation patches for the IOMMU runtime PM conversion - Preparation patches for OMAP4 full-chip retention support For Kirkwood/Dove/mvebu: - New driver for "address decoder controller" for mvebu, which is a piece of hardware that configures addressable devices and peripherals. First user is the boot rom aperture on armada XP since it is needed for SMP support. - New device tree bindings for peripherals such as gpio-fan, iconnect nand, mv_cesa and the above address decoder controller. - Some defconfig updates, mostly to enable new DT boards and a few drivers. - New drivers using the pincontrol subsystem for dove, kirkwood and mvebu - New clean gpio driver for mvebu" * tag 'soc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (98 commits) ARM: mvebu: fix build breaks from multi-platform conversion ARM: OMAP4460/4470: PMU: Enable PMU for OMAP4460/70 ARM: OMAP2+: PMU: Add runtime PM support ARM: OMAP4430: PMU: prepare to create PMU device via HWMOD ARM: OMAP2+: PMU: Convert OMAP2/3 devices to use HWMOD ARM: OMAP3: hwmod data: Add debugss HWMOD data ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems ARM: OMAP: Add a timer attribute for timers that can interrupt the DSP hwrng: OMAP: remove SoC restrictions from driver registration ARM: OMAP: split OMAP1, OMAP2+ RNG device registration hwrng: OMAP: convert to use runtime PM hwrng: OMAP: store per-device data in per-device variables, not file statics ARM: OMAP2xxx: hwmod/CM: add RNG integration data ARM: OMAP2+: gpmc: minimal driver support ARM: OMAP2+: gpmc: Adapt to HWMOD ARM: OMAP2/3: hwmod data: add gpmc ARM: OMAP4: hwmod data: add mmu hwmod for ipu and dsp ARM: OMAP3: hwmod data: add mmu data for iva and isp ARM: OMAP: iommu: fix including iommu.h without IOMMU_API selected ARM: OMAP4: hwmod data: add missing HWMOD_NO_IDLEST flags to some PRCM IP blocks ...
| * \ Merge branch 'kirkwood/drivers' of ↵Olof Johansson2012-09-228-0/+2954
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood From Jason Cooper: New drivers: - pinctrl (dove, kirkwood, mvebu) - gpio (mvebu) * 'kirkwood/drivers' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: add gpio support in defconfig arm: mvebu: add DT information for GPIO banks on Armada 370 and XP arm: mvebu: use GPIO support now that a driver is available Documentation: add description of DT binding for the gpio-mvebu driver gpio: introduce gpio-mvebu driver for Marvell SoCs arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms arm: mvebu: split Kconfig options for Armada 370 and XP ARM: mvebu: adjust Armada XP evaluation board DTS ARM: mvebu: Add pinctrl support to Armada 370 SoC ARM: mvebu: Add pinctrl support to Armada XP SoCs pinctrl: mvebu: add pinctrl driver for Armada XP pinctrl: mvebu: add pinctrl driver for Armada 370 pinctrl: mvebu: kirkwood pinctrl driver pinctrl: mvebu: dove pinctrl driver pinctrl: mvebu: pinctrl driver core Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | pinctrl: mvebu: add pinctrl driver for Armada XPThomas Petazzoni2012-09-223-0/+473
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pinctrl driver is not a full-blown pinctrl driver from scratch: it relies on the common pinctrl-mvebu driver, which is used for all Marvell EBU SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | pinctrl: mvebu: add pinctrl driver for Armada 370Thomas Petazzoni2012-09-223-0/+426
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pinctrl driver is not a full-blown pinctrl driver from scratch: it relies on the common pinctrl-mvebu driver, which is used for all Marvell EBU SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | pinctrl: mvebu: kirkwood pinctrl driverSebastian Hesselbarth2012-09-223-0/+477
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a SoC specific pinctrl driver for Marvell Kirkwood SoCs plus DT binding documentation. This driver will use the mvebu pinctrl driver core. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | pinctrl: mvebu: dove pinctrl driverSebastian Hesselbarth2012-09-223-0/+625
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a SoC specific pinctrl driver for Marvell Dove SoCs plus DT binding documentation. This driver will use the mvebu pinctrl driver core. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | pinctrl: mvebu: pinctrl driver coreSebastian Hesselbarth2012-09-224-0/+953
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a pinctrl driver core for Marvell SoCs plus DT binding documentation. This core driver will be used by SoC family specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/Kconfig
| * | Merge branch 'next/dt' into next/multiplatformOlof Johansson2012-09-201-1/+57
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * next/dt: (182 commits) ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: dt: tegra: whistler: configure power off ARM: mxs: m28evk: Disable OCOTP OUI loading ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent ARM: dts: imx6q-sabrelite: add usbotg pinctrl support ARM: dts: imx23-olinuxino: Add USB host support ARM: dts: imx6q-sabrelite: add usbmisc device ARM: dts: mx23: Add USB resources ARM: dts: mxs: Add ethernetX to macX aliases ARM: msm: Remove non-DT targets from 8960 ARM: msm: Add DT support for 8960 ARM: msm: Move io mapping prototypes to common.h ARM: msm: Rename board-msm8x60 to signify its DT only status ARM: msm: Make 8660 a DT only target ARM: msm: Move 8660 to DT timer ARM: msm: Add DT support to msm_timer ...
* | \ \ Merge tag 'pinctrl-for-v3.7' of ↵Linus Torvalds2012-10-0216-473/+4602
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pinctrl changes from Linus Walleij: "Some of this stuff is hitting arch/arm/* and have been ACKed by the ARM SoC folks, or it's device tree bindings pertaining to the specific driver. These are the bulk pinctrl changes for kernel v3.7: - Add subdrivers for the DB8540 and NHK8815 Nomadik-type ASICs, provide platform config for the Nomadik. - Add a driver for the i.MX35. - Add a driver for the BCM2835, an advanced GPIO expander. - Various fixes and clean-ups and minor improvements for the core, Nomadik, pinctr-single, sirf drivers. - Some platform config for the ux500." * tag 'pinctrl-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (27 commits) pinctrl: add bcm2835 driver pinctrl: clarify idle vs sleep states pinctrl/nomadik: use irq_find_mapping() pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irq pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_range pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_input pinctrl: sirf: add missing pins to pinctrl list pinctrl: sirf: fix a typo in sirfsoc_gpio_probe pinctrl: pinctrl-single: add debugfs pin h/w state info ARM: ux500: 8500: update I2C sleep states pinctrl pinctrl: Fix potential memory leak in pinctrl_register_one_pin() ARM: ux500: tidy up pin sleep modes ARM: ux500: fix spi2 pin group pinctrl: imx: remove duplicated const pinctrl: document semantics vs GPIO ARM: ux500: 8500: use hsit_a_2 group for HSI pinctrl: use kasprintf() in pinmux_request_gpio() pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux pinctrl/nomadik : add MC1_a_2 pin MC1 function group list pinctrl: pinctrl-single: Make sure we do not change bits outside of mask ...
| * | | | pinctrl: add bcm2835 driverSimon Arlott2012-10-013-0/+1081
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt controller, and pinmux/control device. Original driver by Simon Arlott. Rewrite including GPIO chip device by Chris Boot. Upstreaming changes by Stephen Warren: * Wrote DT binding documentation. * Changed brcm,function to an integer to more directly match the datasheet, and to match brcm,pins being an integer. * Implemented pull-up/down pin config. * Removed read-only DT property and related code. The restriction this implemented are driven by the board, not the GPIO HW block, so don't really make sense of a HW block binding, were in general incomplete (since they could only know about the few pins hard-coded into the Raspberry Pi B board design and not the uncommitted GPIOS), and are better represented simply by not writing incorrect data into pin configuration nodes. * Don't set GPIO_IN function select in gpio_request_enable() to avoid glitches; defer this to gpio_set_direction(). Consequently, removed empty bcm2835_pmx_gpio_request_enable(). * Simplified enabled_irq_map[]; make it explicitly 1 entry per bank. * Lifted use of enabled_irq_map[] outside the per-interrupt loop in IRQ handler, thus fixing an issue where the code was indexing into enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID. * Removed locking in IRQ handler, since all other code uses spin_lock_irqsave() and so guarantees it doesn't run concurrently with the handler. * Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of bcm2835_gpio_pins[]. * Remove range-checking from bcm2835_pctl_get_groups_count() since we've decided to trust the pinctrl core. * Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set() directly for simplicity. * Fixed body of dt_free_map() to match latest dt_node_to_map(). * Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl core owns doing this. * Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more descriptive. * Simplified remove(); removed call to non-existent pinctrl_remove_gpio_range(), remove early return on error. * Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's base GPIO number. * Error-handling cleanups in probe(). * Switched to module_platform_driver() rather than open-coding. * Made pin, group, and function names lower-case. * s/broadcom/brcm/ in DT property names. * s/2708/2835/. * Fixed a couple minor checkpatch warnings, and other minor cleanup. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl/nomadik: use irq_find_mapping()Linus Walleij2012-09-281-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code was using a homegrown method of looking up the offset from the irq domain, not to be encouraged. Use the proper irq_find_mapping() call instead. Cc: Lee Jones <lee.jones@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: sirf: add lost chained_irq_enter and exit in sirfsoc_gpio_handle_irqBarry Song2012-09-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the chained irq hang issue, tested by DM9000 driver using GPIO0-3(irqnr=131) as the external IRQ on SiRFmarco: $ cat /proc/interrupts CPU0 CPU1 32: 1608 0 GIC sirfsoc_timer0 33: 0 3197 GIC sirfsoc_timer1 50: 10207 0 GIC sirfsoc-uart 56: 2 0 GIC cc0e0000.i2c 70: 44 0 GIC mmc0 131: 333 0 sirf-gpio-irq eth0 ... Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: sirf: initialize the irq_chip pointer of pinctrl_gpio_rangeBarry Song2012-09-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch initializes the optional irq_chip pointer gc in sirfsoc pinctrl_gpio_range. Signed-off-by: Baohua Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: sirf: fix spinlock deadlock in sirfsoc_gpio_set_inputBarry Song2012-09-281-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sirfsoc_gpio_set_input() is called in those functions which have held the spinlock, so delete the duplicated locking. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: sirf: add missing pins to pinctrl listBarry Song2012-09-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always use pinctrl_request_gpio() to get GPIO, If we don't have these missing pins in the pin list, gpio_request and related operations will fail for them. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: sirf: fix a typo in sirfsoc_gpio_probeBarry Song2012-09-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Return 0 while probing success. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: pinctrl-single: add debugfs pin h/w state infoMatt Porter2012-09-281-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for displaying the individual pin h/w config state. Signed-off-by: Matt Porter <mporter@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: Fix potential memory leak in pinctrl_register_one_pin()Sachin Kamat2012-09-271-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pindesc' was not freed when returning from an error induced exit path. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: imx: remove duplicated constRichard Zhao2012-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix smatch warning: drivers/pinctrl/pinctrl-imx.c:435:21: warning: duplicate const Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: use kasprintf() in pinmux_request_gpio()Thomas Petazzoni2012-09-141-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using a temporary buffer, snprintf() and kstrdup(), just use kasprintf() that does the same thing in just oneline. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Colin Cross <ccross@google.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-11 15:19:22 +0000