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path: root/drivers/platform/x86/intel_pmc_core.h
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* platform/x86: intel_pmc_core: Move to intel sub-directoryKate Hsuan2021-08-201-346/+0
* platform/x86: intel_pmc_core: Prevent possibile overflowDavid E. Box2021-08-171-0/+2
* platform/x86: intel_pmc_core: Add LTR registers for Tiger LakeGayatri Kammela2021-04-191-1/+3
* platform/x86: intel_pmc_core: Add option to set/clear LPM modeDavid E. Box2021-04-191-0/+20
* platform/x86: intel_pmc_core: Get LPM requirements for Tiger LakeGayatri Kammela2021-04-191-0/+2
* platform/x86: intel_pmc_core: Show LPM residency in microsecondsGayatri Kammela2021-04-191-0/+3
* platform/x86: intel_pmc_core: Handle sub-states genericallyGayatri Kammela2021-04-191-2/+16
* platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysf...Tamar Mashiah2021-04-131-0/+6
* platform/x86: intel_pmc_core: Fix the slp_s0 counter displayed valueGayatri Kammela2020-10-071-1/+4
* platform/x86: intel_pmc_core: avoid unused-function warningsArnd Bergmann2020-05-051-2/+0
* platform/x86: intel_pmc_core: Make pmc_core_substate_res_show() genericGayatri Kammela2020-03-201-1/+2
* platform/x86: intel_pmc_core: Add debugfs support to access live status regis...Gayatri Kammela2020-02-111-0/+2
* platform/x86: intel_pmc_core: Add debugfs entry for low power mode status reg...Gayatri Kammela2020-02-101-0/+5
* platform/x86: intel_pmc_core: Add debugfs entry to access sub-state residenciesGayatri Kammela2020-02-101-0/+21
* platform/x86: intel-ips: Use the correct style for SPDX License IdentifierNishad Kamdar2020-01-101-1/+1
* platform/x86: intel_pmc_core: Add Intel Tiger Lake supportGayatri Kammela2019-12-201-0/+2
* platform/x86: intel_pmc_core: Create platform dependent bitmap structsGayatri Kammela2019-12-201-1/+1
* platform/x86: intel_pmc_core: Allow to dump debug registers on S0ix failureRajat Jain2019-05-061-0/+7
* platform/x86: intel_pmc_core: Quirk to ignore XTAL shutdownRajneesh Bhardwaj2019-02-231-0/+5
* platform/x86: intel_pmc_core: Add Package cstates residency infoRajneesh Bhardwaj2019-02-231-0/+1
* platform/x86: intel_pmc_core: Add ICL platform supportRajneesh Bhardwaj2019-02-231-0/+4
* platform/x86: intel_pmc_core: Include Reserved IP for LTRRajneesh Bhardwaj2019-02-211-0/+2
* platform/x86: intel_pmc_core: Fix PCH IP sts readingRajneesh Bhardwaj2019-02-051-1/+1
* platform/x86: intel_pmc_core: Decode Snoop / Non Snoop LTRRajneesh Bhardwaj2018-11-101-0/+7
* platform/x86: intel_pmc_core: Fix LTR IGNORE Max offsetRajneesh Bhardwaj2018-11-101-1/+3
* platform/x86: intel_pmc_core: Show Latency Tolerance infoRajneesh Bhardwaj2018-11-101-7/+50
* platform/x86: intel_pmc: Convert to use SPDX identifierAndy Shevchenko2018-09-271-10/+1
* platform/x86: intel_pmc_core: Add CNP SLPS0 debug registersBox, David E2018-07-021-0/+6
* platform/x86: intel_pmc_core: Special case for CoffeelakeRajneesh Bhardwaj2018-02-041-0/+2
* platform/x86: intel_pmc_core: Add CannonLake PCH supportRajneesh Bhardwaj2018-02-041-0/+11
* platform/x86: intel_pmc_core: Substitute PCI with CPUID enumerationSrinivas Pandruvada2018-01-291-2/+1
* platform/x86: intel_pmc_core: Fix kernel doc for pmc_devRajneesh Bhardwaj2018-01-161-5/+7
* platform/x86: intel_pmc_core: Remove unused variableRajneesh Bhardwaj2018-01-161-2/+0
* platform/x86: intel_pmc_core: Remove unused EXPORTED APIRajneesh Bhardwaj2018-01-161-1/+0
* platform/x86: intel_pmc_core: Make the driver PCH family agnosticSrinivas Pandruvada2017-08-131-1/+29
* platform/x86: intel_pmc_core: Add LTR IGNORE debug featureRajneesh Bhardwaj2016-12-131-0/+2
* platform/x86: intel_pmc_core: Add MPHY PLL clock gating statusRajneesh Bhardwaj2016-12-131-0/+7
* platform/x86: intel_pmc_core: ModPhy core lanes pg statusRajneesh Bhardwaj2016-12-131-0/+31
* platform/x86: intel_pmc_core: Add PCH IP Power Gating StatusRajneesh Bhardwaj2016-12-131-0/+67
* platform/x86: intel_pmc_core: Fix PWRMBASE mask and mmio reg lenRajneesh Bhardwaj2016-12-131-1/+2
* intel_pmc_core: Convert to DEFINE_DEBUGFS_ATTRIBUTEAndy Shevchenko2016-07-061-2/+1
* platform/x86: Add PMC Driver for Intel Core SoCRajneesh Bhardwaj2016-05-271-0/+51
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-12 20:08:35 +0000