summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Expand)AuthorAgeFilesLines
* clk: qcom: Use ARRAY_SIZE in gpucc-sc7180 for parent clocksDouglas Anderson2020-02-031-1/+1
* clk: qcom: Get rid of the test clock for gpucc-sc7180Douglas Anderson2020-02-031-3/+1
* clk: qcom: Use ARRAY_SIZE in dispcc-sc7180 for parent clocksDouglas Anderson2020-02-031-11/+11
* clk: qcom: Get rid of the test clock for dispcc-sc7180Douglas Anderson2020-02-031-22/+10
* clk: qcom: Get rid of fallback global names for dispcc-sc7180Douglas Anderson2020-02-031-13/+10
* clk: qcom: rcg2: Don't crash if our parent can't be found; return an errorDouglas Anderson2020-02-031-0/+3
* clk: ls1028a: fix a dereference of pointer 'parent' before a null checkColin Ian King2020-02-031-1/+3
* clk: qcom: Don't overwrite 'cfg' in clk_rcg2_dfs_populate_freq()Stephen Boyd2020-02-031-4/+4
* clk: ls1028a: Fix warning on clamp() usageStephen Boyd2020-02-031-2/+2
*-----------. Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', '...Stephen Boyd2020-01-3160-1125/+12122
|\ \ \ \ \ \ \
| | | | | | | * clk: qoriq: add ls1088a hwaccel clocks supportYangbo Lu2020-01-301-0/+29
| | | | | | | * clk: ls1028a: Add clock driver for Display output interfaceWen He2020-01-303-0/+297
| | | | | | * | clk: fsl-sai: new driverMichael Walle2020-01-283-0/+105
| | | | | | * | clk: composite: add _register_composite_pdata() variantsMichael Walle2020-01-281-3/+53
| | | | | | |/
| | | | | * | clk: qcom: rpmh: Sort OF match tableBjorn Andersson2020-01-281-1/+1
| | | | | * | clk: qcom: Add ipq6018 Global Clock Controller supportSricharan R2020-01-093-0/+4644
| | | | | * | clk: qcom: gcc-msm8996: Fix parent for CLKREF clocksBjorn Andersson2020-01-061-7/+28
| | | | | * | clk: qcom: rpmh: Add IPA clock for SC7180Taniya Das2020-01-061-0/+1
| | | | | * | clk: qcom: rpmh: skip undefined clocks when registeringTaniya Das2020-01-061-1/+6
| | | | | * | clk: qcom: Add video clock controller driver for SC7180Taniya Das2020-01-043-0/+268
| | | | | * | clk: qcom: Add graphics clock controller driver for SC7180Taniya Das2020-01-043-0/+275
| | | | | * | clk: qcom: apcs-msm8916: use clk_parent_data to specify the parentNiklas Cassel2020-01-041-5/+5
| | | | | * | Merge branch 'clk-register-dt-node-better' into clk-qcomStephen Boyd2020-01-041-2/+25
| | | | | |\ \
| | | | | * | | clk: qcom: Add display clock controller driver for SC7180Taniya Das2019-12-233-0/+786
| | | | | * | | clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibrationTaniya Das2019-12-232-0/+80
| | | | | * | | clk: qcom: alpha-pll: Remove useless read from set rateTaniya Das2019-12-231-6/+1
| | | | | * | | clk: qcom: Add missing msm8998 gcc_bimc_gfx_clkJeffrey Hugo2019-12-231-0/+14
| | | | | * | | clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFERJorge Ramirez-Ortiz2019-12-181-1/+2
| | | | | * | | clk: qcom: hfpll: use clk_parent_data to specify the parentJorge Ramirez-Ortiz2019-12-181-1/+3
| | | | | * | | clk: qcom: hfpll: CLK_IGNORE_UNUSEDJorge Ramirez-Ortiz2019-12-181-0/+7
| | | | | * | | clk: qcom: hfpll: register as clock providerJorge Ramirez-Ortiz2019-12-181-1/+9
| | | | | * | | clk: qcom: gcc: limit GPLL0_AO_OUT operating frequencyJorge Ramirez-Ortiz2019-12-183-1/+10
| | | | | * | | clk: qcom: smd: Add missing bimc clockJeffrey Hugo2019-12-181-0/+3
| | | | | * | | clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driverJeffrey Hugo2019-12-183-0/+2923
| | | | | * | | clk: qcom: mmcc8974: move gfx3d_clk_src from the mmcc to rpmBrian Masney2019-12-182-13/+2
| | | | | * | | clk: qcom: dispcc: Add support for display port clocksTaniya Das2019-12-181-1/+213
| | | | | * | | clk: qcom: rcg2: Add support for display port clock opsTaniya Das2019-12-183-0/+79
| | | | | | |/ | | | | | |/|
| | | | * | | clk: tegra20/30: Explicitly set parent clock for Video DecoderDmitry Osipenko2020-01-102-2/+2
| | | | * | | clk: tegra20/30: Don't pre-initialize displays parent clockDmitry Osipenko2020-01-102-4/+0
| | | | * | | clk: tegra: divider: Check UART's divider enable-bit state on rate's recalcul...Dmitry Osipenko2020-01-101-2/+7
| | | | * | | clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe()Sowjanya Komatineni2020-01-101-2/+1
| | | | * | | clk: tegra: Mark fuse clock as criticalStephen Warren2020-01-081-1/+5
| | | | |/ /
| | | * | | clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flagTejas Patel2020-01-231-5/+31
| | | * | | clk: zynqmp: Fix divider calculationRajan Vaja2020-01-231-0/+46
| | | * | | clk: zynqmp: Add support for get max dividerRajan Vaja2020-01-231-0/+36
| | | * | | clk: zynqmp: Warn user if clock user are more than allowedRajan Vaja2020-01-232-2/+6
| | | * | | clk: zynqmp: Extend driver for versalRajan Vaja2020-01-231-1/+2
| | | |/ /
| | * | | clk: ti: clkctrl: Fix hidden dependency to node nameTony Lindgren2020-01-202-12/+88
| | * | | clk: ti: add clkctrl data dra7 sgxTony Lindgren2020-01-201-0/+35
| | * | | clk: ti: omap5: Add missing AESS clockTony Lindgren2020-01-201-0/+15
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-10 02:26:50 +0000