| Commit message (Collapse) | Author | Age | Files | Lines |
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Add mt8188 and mt8186 .dbg_dump callback to print some information when
DSP panic occurs.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Yaochun Hung <yc.hung@mediatek.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230601034939.15802-2-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add support of SOF on MediaTek MT8188 SoC.
MT8188 ADSP integrates with a single core Cadence HiFi-5 DSP.
The IPC communication between AP and DSP is based on shared DRAM and
mailbox interrupt.
The change in the mt8186.h is compatible on both mt8186 and
mt8188. The register controls booting the DSP core with the
default address or the user specified address. Both mt8186
and mt8188 should boot with the user specified boot in the driver.
The usage of the register is the same on both SoC, but the
control bit is different on mt8186 and mt8188, which is bit 1 on mt8186
and bit 0 on mt8188. Configure the redundant bit has noside effect
on both SoCs.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230110084312.12953-3-tinghan.shen@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o:(.opd+0x18): multiple
definition of `adsp_clock_on';
sound/soc/sof/mediatek/mt8195/mt8195-clk.o:(.opd+0x60): first defined
here
ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o: in function
`.adsp_clock_on':
ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o:(.opd+0x30): multiple
definition of `adsp_clock_off';
sound/soc/sof/mediatek/mt8195/mt8195-clk.o:(.opd+0x78): first defined
here
ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o: in function
`.adsp_clock_off':
ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o:(.opd+0x0): multiple
definition of `sof_hifixdsp_boot_sequence';
sound/soc/sof/mediatek/mt8195/mt8195-loader.o:(.opd+0x0): first defined
here
ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o: in function
`.sof_hifixdsp_boot_sequence':
ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o:(.opd+0x18): multiple
definition of `sof_hifixdsp_shutdown';
sound/soc/sof/mediatek/mt8195/mt8195-loader.o:(.opd+0x18): first defined
here
ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o: in function
`.sof_hifixdsp_shutdown':
Fixes: 570c14dc92d5 ("ASoC: SOF: mediatek: Add mt8186 sof fw loader and
dsp ops")
Fixes: 210b3ab932f7 ("ASoC: SOF: mediatek: Add mt8186 dsp clock support")
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Link: https://lore.kernel.org/r/20220427071030.10172-1-tinghan.shen@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add mt8186-loader module with ops callback to load and run firmware
on mt8186 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Yaochun Hung <yc.hung@mediatek.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220422055659.8738-3-tinghan.shen@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add support of SOF on Mediatek mt8186 SoC.
MT8186 has 2 Cortex A76 cores paired with 6 Cortex A55 cores.
It also has Cadence HiFi-5 DSP single core. The IPC communication
between AP and DSP is based on shared DRAM and mailbox interrupt.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Yaochun Hung <yc.hung@mediatek.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220422055659.8738-2-tinghan.shen@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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