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path: root/tools/testing/cxl/test/cxl.c
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* cxl: Fix cxl_endpoint_get_perf_coordinate() support for RCHDave Jiang2024-04-291-0/+7
* cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coordDave Jiang2024-04-081-4/+6
* cxl/test: Add support for qos_class checkingDave Jiang2024-02-161-9/+54
* tools/testing/cxl: Add hostbridge UID string for cxl_test mock hb devicesDave Jiang2023-12-221-0/+4
* cxl: Add cxl_num_decoders_committed() usage to cxl_testDave Jiang2023-12-041-2/+3
* cxl/region: Fix x1 root-decoder granularity calculationsJim Harris2023-10-271-1/+1
* tools/testing/cxl: Remove unused SZ_512G macroXiao Yang2023-07-201-4/+0
* Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams2023-06-251-20/+10
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| * cxl: Rename 'uport' to 'uport_dev'Dan Williams2023-06-251-10/+10
| * cxl/acpi: Probe RCRB later during RCH downstream port creationRobert Richter2023-06-251-10/+0
* | cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM}Dan Williams2023-06-251-3/+3
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* Merge branch 'for-6.3/cxl-rr-emu' into cxl/nextDan Williams2023-02-141-2/+4
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| * cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decodersDave Jiang2023-02-141-1/+2
| * cxl/hdm: Emulate HDM decoder from DVSEC range registersDave Jiang2023-02-141-1/+2
* | Merge branch 'for-6.3/cxl-ram-region' into cxl/nextDan Williams2023-02-101-10/+137
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| * | tools/testing/cxl: Define a fixed volatile configuration to parseDan Williams2023-02-101-10/+137
* | | tools/testing/cxl: Remove cxl_test module math loading messageAlison Schofield2023-01-261-3/+1
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* / tools/testing/cxl: Prevent cxl_test from confusing production modulesDan Williams2023-01-051-0/+8
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* Merge branch 'for-6.2/cxl-xor' into for-6.2/cxlDan Williams2022-12-051-2/+114
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| * tools/testing/cxl: Add XOR Math support to cxl_testAlison Schofield2022-12-031-3/+115
* | tools/testing/cxl: Add an RCH topologyDan Williams2022-12-051-9/+141
* | cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter2022-12-031-0/+10
* | tools/testing/cxl: Make mock CEDT parsing more robustDan Williams2022-12-021-4/+6
* | tools/testing/cxl: Add bridge mocking supportDan Williams2022-11-141-2/+8
* | cxl: Unify debug messages when calling devm_cxl_add_dport()Robert Richter2022-11-141-8/+1
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* tools/testing/cxl: Add a single-port host-bridge regression configDan Williams2022-11-041-19/+278
* tools/testing/cxl: Fix some error exitsDan Williams2022-11-041-2/+2
* cxl/hdm: Commit decoder state to hardwareDan Williams2022-07-251-0/+46
* cxl/core: Define a 'struct cxl_endpoint_decoder'Dan Williams2022-07-211-3/+7
* cxl/core: Define a 'struct cxl_switch_decoder'Dan Williams2022-07-211-7/+16
* tools/testing/cxl: Fix decoder default stateDan Williams2022-07-101-1/+0
* tools/testing/cxl: Add partition supportDan Williams2022-07-101-39/+1
* tools/testing/cxl: Expand CFMWS windowsDan Williams2022-07-101-5/+5
* tools/testing/cxl: Move cxl_test resources to the top of memoryDan Williams2022-07-101-1/+2
* cxl/core: Rename ->decoder_range ->hpa_rangeDan Williams2022-07-091-1/+1
* tools/testing/cxl: Add a physical_node linkDan Williams2022-02-081-2/+19
* tools/testing/cxl: Enumerate mock decodersDan Williams2022-02-081-20/+98
* tools/testing/cxl: Mock one level of switchesDan Williams2022-02-081-41/+97
* tools/testing/cxl: Fix root port to host bridge assignmentDan Williams2022-02-081-1/+1
* cxl/memdev: Add numa_node attributeDan Williams2022-02-081-0/+1
* cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams2022-02-081-9/+5
* cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky2022-02-081-2/+0
* cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams2022-02-081-0/+29
* cxl/core: Generalize dport enumeration in the coreDan Williams2022-02-081-21/+46
* cxl/test: Mock acpi_table_parse_cedt()Dan Williams2021-11-151-22/+46
* tools/testing/cxl: Introduce a mock memory device + driverDan Williams2021-09-211-1/+68
* tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams2021-09-211-0/+509
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