Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | cxl/test: Add support for qos_class checking | Dave Jiang | 2024-02-16 | 1 | -0/+1 |
* | cxl/acpi: Probe RCRB later during RCH downstream port creation | Robert Richter | 2023-06-25 | 1 | -3/+0 |
* | cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders | Dave Jiang | 2023-02-14 | 1 | -1/+2 |
* | cxl/hdm: Emulate HDM decoder from DVSEC range registers | Dave Jiang | 2023-02-14 | 1 | -1/+2 |
* | cxl/acpi: Extract component registers of restricted hosts from RCRB | Robert Richter | 2022-12-03 | 1 | -0/+3 |
* | cxl/core/port: Remove @host argument for dport + decoder enumeration | Dan Williams | 2022-02-08 | 1 | -5/+4 |
* | cxl/core/hdm: Add CXL standard decoder enumeration to the core | Dan Williams | 2022-02-08 | 1 | -0/+3 |
* | cxl/core: Generalize dport enumeration in the core | Dan Williams | 2022-02-08 | 1 | -2/+4 |
* | cxl/test: Mock acpi_table_parse_cedt() | Dan Williams | 2021-11-15 | 1 | -3/+3 |
* | tools/testing/cxl: Introduce a mocked-up CXL port hierarchy | Dan Williams | 2021-09-21 | 1 | -0/+27 |