summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/spi/spi-pl022.yaml
blob: bda45ff3d2942f358efd6ae1991720cd76ade11b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM PL022 SPI controller

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

allOf:
  - $ref: "spi-controller.yaml#"

# We need a select here so we don't match all nodes with 'arm,primecell'
select:
  properties:
    compatible:
      contains:
        const: arm,pl022
  required:
    - compatible

properties:
  compatible:
    items:
      - const: arm,pl022
      - const: arm,primecell

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 2

  clock-names:
    items:
      - const: sspclk
      - const: apb_pclk

  pl022,autosuspend-delay:
    description: delay in ms following transfer completion before the
      runtime power management system suspends the device. A setting of 0
      indicates no delay and the device will be suspended immediately.
    $ref: "/schemas/types.yaml#/definitions/uint32"

  pl022,rt:
    description: indicates the controller should run the message pump with realtime
      priority to minimise the transfer latency on the bus (boolean)
    type: boolean

  dmas:
    description:
      Two or more DMA channel specifiers following the convention outlined
      in bindings/dma/dma.txt
    minItems: 2
    maxItems: 32

  dma-names:
    description:
      There must be at least one channel named "tx" for transmit and named "rx"
      for receive.
    minItems: 2
    maxItems: 32
    additionalItems: true
    items:
      - const: rx
      - const: tx

  resets:
    maxItems: 1

patternProperties:
  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
    type: object
    # SPI slave nodes must be children of the SPI master node and can
    # contain the following properties.
    properties:
      pl022,interface:
        description: SPI interface type
        $ref: "/schemas/types.yaml#/definitions/uint32"
        enum:
          - 0      # SPI
          - 1      # Texas Instruments Synchronous Serial Frame Format
          - 2      # Microwire (Half Duplex)

      pl022,com-mode:
        description: Specifies the transfer mode
        $ref: "/schemas/types.yaml#/definitions/uint32"
        enum:
          - 0      # interrupt mode
          - 1      # polling mode
          - 2      # DMA mode
        default: 1

      pl022,rx-level-trig:
        description: Rx FIFO watermark level
        $ref: "/schemas/types.yaml#/definitions/uint32"
        minimum: 0
        maximum: 4

      pl022,tx-level-trig:
        description: Tx FIFO watermark level
        $ref: "/schemas/types.yaml#/definitions/uint32"
        minimum: 0
        maximum: 4

      pl022,ctrl-len:
        description: Microwire interface - Control length
        $ref: "/schemas/types.yaml#/definitions/uint32"
        minimum: 0x03
        maximum: 0x1f

      pl022,wait-state:
        description: Microwire interface - Wait state
        $ref: "/schemas/types.yaml#/definitions/uint32"
        enum: [0, 1]

      pl022,duplex:
        description: Microwire interface - Full/Half duplex
        $ref: "/schemas/types.yaml#/definitions/uint32"
        enum: [0, 1]

required:
  - compatible
  - reg
  - interrupts

unevaluatedProperties: false

examples:
  - |
    spi@e0100000 {
      compatible = "arm,pl022", "arm,primecell";
      reg = <0xe0100000 0x1000>;
      #address-cells = <1>;
      #size-cells = <0>;
      interrupts = <0 31 0x4>;
      dmas = <&dma_controller 23 1>,
        <&dma_controller 24 0>;
      dma-names = "rx", "tx";

      m25p80@1 {
        compatible = "st,m25p80";
        reg = <1>;
        spi-max-frequency = <12000000>;
        spi-cpol;
        spi-cpha;
        pl022,interface = <0>;
        pl022,com-mode = <0x2>;
        pl022,rx-level-trig = <0>;
        pl022,tx-level-trig = <0>;
        pl022,ctrl-len = <0x11>;
        pl022,wait-state = <0>;
        pl022,duplex = <0>;
      };
    };
...